SC2544MLTRT Semtech, SC2544MLTRT Datasheet - Page 15

• Manufacturer Part Number: SC2544MLTRT
• Description: IC CTRL/REG SYNC BUCK 24-MLPQ
• Manufacturer: Semtech
• Type: Step-Down (Buck)r

Specifications of SC2544MLTRT

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 2
• Voltage - Output: Adj to 0.75V
• Frequency - Switching: 100kHz ~ 300kHz
• Voltage - Input: 4.5 ~ 28 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-MLPQ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -
• Other names: SC2544MLTR

Bottom Switch
Bottom Switch
Bottom Switch
Bottom Switch
Bottom Switch
The RMS current in bottom switch is given by
The conduction losses are then
where R
MOSFET. If the input voltage to output voltage ratio
is high (e.g. V
be small. Since the bottom switch conducts with duty
ratio (1-D), the corresponding conduction losses can
be quite high.
Due to non-overlapping conduction between the top and
the bottom MOSFET’s, the internal body diode or the
external Schottky diode across the drain and source
terminals always conducts prior to the turn on of the
bottom MOSFET. The bottom MOSFET switches on with
only a diode voltage between its drain and source
terminals. The switching loss is negligible due to near zero-
voltage switching.
The gate losses are estimated as
The total bottom switch losses are then
Once the power losses for the top and bottom
MOSFET’s are known, thermal and package design
at component and system level should be done to
verify that the maximum die junction temperature
(T
worst-case condition.
impedance from junction to ambient (
satisfy
θ
packaging material, the thermal contact surface,
thermal compound property, the available effective
heat sink area, and the air flow condition (natual or
forced convection). Actual temperature measurement
of the prototype should be carried out to verify the
thermal design.
POWER MANAGEMENT
Applications Information (Cont.)
j,max
ja
2005 Semtech Corp.
depends on the die to substrate bonding,
, usually 125
ds(on)
is the channel resistance of bottom
in
=12V, V
I
P
Q
P
P
, 2
bg
bc
b
ja
rms
=P
=I
o
C) is not exceeded under the
Q2,rms
bc
T
R
R
+P
I
, j
o
gt
max
g
o
=1.5V), the duty ratio D will
bg
Q
P
2
1 (
.
loss
R
g
The equivalent thermal
V
T
ds(on)
D
, a
cc
max
)(
f
s
1
.
.
.
12
2
. )
θ
ja
) should
15
Main Control Loop Design
Main Control Loop Design
Main Control Loop Design
Main Control Loop Design
Main Control Loop Design
The goal of compensation is to shape the frequency
response charatericstics of the buck converter to
achieve a better DC accuracy and a faster transient
response for the output voltage, while maintaining
the loop stability.
The block diagram in Figure 10 represents the control
loop of a buck converter designed with the SC2544. The
control loop consists of a compensator, a PWM modula-
tor, and an LC filter.
The LC filter and PWM modulator represent the small
signal model of the buck converter operating at fixed
switching frequency. The transfer function of the
model is given by:
where V
the internal ramp, and R is the equivalent load.
The model is a second order system with a finite DC
gain, a complex pole pair at Fo, and an ESR zero at
Fz, as shown in Figure 11. The locations of the poles
and zero are determined by:
Zs
REF
Fig. 10. Block diagram of the control loop.
IN
REF
is the input voltage, Vm is the amplitude of
V
V
O
C
Zf
+
-
=
V
V
IN
EA
m
F
F
Z
⋅
O
1
ERROUT
+
MODULATOR
2
π 2
1
sL
PWM
π
+
R
/
sR
1
1
R
e
LC
sr
ESR
+
C
O
s
C
O
2
LC
L
Resr
Co
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