LT1725CGN#TR Linear Technology, LT1725CGN#TR Datasheet - Page 14

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LT1725CGN#TR

Manufacturer Part Number
LT1725CGN#TR
Description
IC CTRLR ISO FLYBACK HV 16SSOP
Manufacturer
Linear Technology
Type
Flybackr
Datasheet

Specifications of LT1725CGN#TR

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Frequency - Switching
50kHz ~ 250kHz
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output
-
Voltage - Output
-
Voltage - Input
-
Power - Output
-

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APPLICATIO S I FOR ATIO
LT1725
with the new compensation in place. Modify the original
R
effective compensation.
SELECTING OSCILLATOR CAPACITOR VALUE
The switching frequency of the LT1725 is set by an
external capacitor connected between the OSCAP pin and
ground. Recommended values are between 200pF and
33pF, yielding switching frequencies between 50kHz and
250kHz. Figure 2 shows the nominal relationship between
external capacitance and switching frequency. To mini-
mize stray capacitance and potential noise pickup, this
capacitor should be placed as close as possible to the IC
and the OSCAP node length/area minimized.
SELECTING TIMING RESISTOR VALUES
There are three internal “one-shot” times that are pro-
grammed by external application resistors: minimum on
time, enable delay time and minimum enable time. These
are all part of the isolated flyback control technique, and
their functions have been previously outlined in the Theory
of Operation section. Figures 3 shows nominal observed
time versus external resistor value for these functions.
The following information should help in selecting and/or
optimizing these timing values.
14
OCMP
value if necessary to increase or decrease the
300
200
100
50
30
Figure 2. f
U
OSC
C
OSCAP
U
vs OSCAP Value
(pF)
100
W
1725 F02
200
U
Minimum On Time
This time defines a period whereby the normal switch
current limit is ignored. This feature provides immunity to
the leading edge current spike often seen at the source
node of the external power MOSFET, due to rapid charging
of its gate/source capacitance. This current spike is not
indicative of actual current level in the transformer pri-
mary, and may cause irregular current mode switching
action, especially at light load.
However, the user must remember that the LT1725 does
not “skip cycles” at light loads. Therefore, minimum on
time will set a limit on minimum delivered power and con-
sequently a minimum load requirement to maintain regu-
lation (see Minimum Load Considerations). Similarly,
minimum on time has a direct affect on short-circuit be-
havior (see Maximum Load/Short-Circuit Considerations).
The user is normally tempted to set the minimum on time
to be short to minimize these load related consequences.
(After all, a smaller minimum on time approaches the ideal
case of zero, or no minimum.) However, a longer time may
be required in certain applications based on MOSFET
switching current spike considerations.
Enable Delay Time
This function provides a programmed delay between
turnoff of the gate drive node and the subsequent enabling
of the feedback amplifier. At high loads, a primary side
voltage spike after MOSFET turnoff may be observed due
Figure 3. “One Shot” Times vs Programming Resistor
1000
500
100
20
R
T
(kΩ)
100
1725 F03
250
1725fa

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