LT1375CS8#TR Linear Technology, LT1375CS8#TR Datasheet - Page 23

• Manufacturer Part Number: LT1375CS8#TR
• Description: IC REG SW ADJ 1.5A STEPDWN 8SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT1375CS8#TR

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 2.42 ~ 21.5 V
• Current - Output: 1.5A
• Frequency - Switching: 500kHz
• Voltage - Input: 5 ~ 25 V
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIONS
Keep in mind that this procedure does not take initial
component tolerance into account. You should see fairly
clean response under all load and line conditions to ensure
that component variations will not cause problems. One
note here: according to Murphy, the component most
likely to be changed in production is the output capacitor,
because that is the component most likely to have manu-
facturer variations (in ESR) large enough to cause prob-
lems. It would be a wise move to lock down the sources of
the output capacitor in production.
light loads, as evidenced in Figure 17 with I
Switching regulators tend to have dramatic shifts in loop
response at very light loads, mostly because the inductor
current becomes discontinuous. One common result is
very slow but stable characteristics. A second possibility
is low phase margin, as evidenced by ringing at the output
with transients. The good news is that the low phase
margin at light loads is not particularly sensitive to com-
ponent variation, so if it looks reasonable under a transient
test, it will probably not be a problem in production. Note
that frequency of the light load ringing may vary with
component tolerance but phase margin generally hangs in
there.
THERMAL CALCULATIONS
Power dissipation in the LT1376 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following formu-
las show how to calculate each of these losses. These
formulas assume continuous mode operation, so they
should not be used for calculating efficiency at light load
currents.
Switch loss:
Boost current loss:
A possible exception to the “clean response” rule is at very
P
P
SW
BOOST
=
R
=
SW OUT
V
OUT
( ) ( )
I
V
2
IN
(
U
0 008
2
.
V
OUT
V
IN
INFORMATION
U
+
I
+
OUT
16
)
ns I
/
75
W
( )( )( )
OUT
V
LOAD
IN
U
f
= 50mA.
Quiescent current loss:
R
16ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with V
Total power dissipation is 0.28 + 0.053 + 0.04 = 0.37W.
Thermal resistance for LT1376 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 120°C/W. No plane will increase resistance to about
160°C/W. To calculate die temperature, use the proper
thermal resistance number for the desired package and
add in worst-case ambient temperature:
With the SO-8 package (θ
temperature of 70°C,
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
SW
T
T
P
P
P
P
J
J
Q
SW
Q
BOOST
= Switch resistance (≈ 0.4)
= T
= 70 + 120 (0.37) = 114.4°C
=
=
=
=
V
10 0 001 5 0 005
A
IN
0 2 0 08 0 28
( )( ) ( )
+ θ
=
0 4 1 5
.
(
(
0 001
.
( )
.
+
.
5
JA
10
2
IN
(P
.
(
)
2
)
0 008 1 75
= 10V, V
+
TOT
+
.
=
V
10
(
)
OUT
+ ⎛ ⎝
.
.
+
16 10
(
JA
0 005
W
OUT
/
.
)
•
= 120°C/W), at an ambient
+
)
= 5V and I
LT1375/LT1376
( ) (
)
−
=
5
9
+
0 053
2
⎞
⎠
⎛
⎜
⎝
.
( )( )
10
0 002
1 10 500 10
V
.
OUT
W
OUT
2
V
)
⎞
⎟
⎠
⎛
⎝
IN
(
=
0 002
= 1A:
.
0 04
.
23
•
)
W
13756fd
3
⎞
⎠