LT1725IS#TR Linear Technology, LT1725IS#TR Datasheet - Page 19

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LT1725IS#TR

Manufacturer Part Number
LT1725IS#TR
Description
IC CNTRLR ISOLATD FLYBACK 16SOIC
Manufacturer
Linear Technology
Type
Flybackr
Datasheet

Specifications of LT1725IS#TR

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Frequency - Switching
50kHz ~ 250kHz
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output
-
Voltage - Output
-
Voltage - Input
-
Power - Output
-
Other names
LT1725ISTR

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APPLICATIO S I FOR ATIO
Output Impedance Error
An additional error source is caused by transformer sec-
ondary current flow through the real life nonzero imped-
ances of the output rectifier, transformer secondary and
output capacitor. Because the secondary current only
flows during the off portion of the duty cycle, the effective
output impedance equals the “DC” lumped secondary
impedance times the inverse of the off duty cycle. If the
output load current remains relatively constant, or, in less
critical applications, the error may be judged acceptable
and the feedback resistor divider ratio adjusted for nomi-
nal expected error. In more demanding applications, out-
put impedance error may be minimized by the use of the
load compensation function (see Load Compensation).
MINIMUM LOAD CONSIDERATIONS
The LT1725 generally provides better low load perfor-
mance than previous generation switcher/controllers uti-
lizing indirect output voltage sensing techniques.
Specifically, it contains circuitry to detect flyback pulse
“collapse,” thereby supporting operation well into discon-
tinuous mode. Nevertheless, there still remain constraints
to ultimate low load operation. These relate to the mini-
mum switch on time and the minimum enable time.
Discontinuous mode operation will be assumed in the
following theoretical derivations.
As outlined in the Operation section, the LT1725 utilizes a
minimum output switch on time, t
combined with expected V
yield an expression for minimum delivered power.
This expression then yields a minimum output current
constraint:
Minimum Power
I
OUT MIN
(
)
=
2
1
L
U
PRI
=
=
V
2
1
f
OUT
V
U
OUT
IN
L
PRI
f
and switching frequency to
I
OUT
(
V
(
IN
V
W
IN
ON
. This value can be
t
ON
t
ON
)
2
)
2
where
U
An additional constraint has to do with the minimum
enable time. The LT1725 derives its output voltage infor-
mation from the flyback pulse. If the internal minimum
enable time pulse extends beyond the flyback pulse, loss
of regulation will occur. The onset of this condition can be
determined by setting the width of the flyback pulse equal
to the sum of the flyback enable delay, t
minimum enable time, t
the load is then:
Which yields a minimum output constraint:
Note that generally, depending on the particulars of input
and output voltages and transformer inductance, one of
the above constraints will prove more restrictive. In other
words, the minimum load current in a particular applica-
tion will be either “output switch minimum on time”
constrained, or “minimum flyback pulse time” constrained.
(A final note—L
tance as seen from the primary or secondary side respec-
tively. This general treatment allows these expressions to
be used when the transformer turns ratio is nonunity.)
f = switching frequency
L
V
V
t
f = switching frequency
L
V
t
t
I
Minimum Power
ON
ED
EN
OUT MIN
PRI
SEC
IN
OUT
OUT
= enable delay time
= minimum enable time
(
= input voltage
= output switch minimum on time
= transformer primary side inductance
= transformer secondary side inductance
= output voltage
= output voltage
)
=
2
1
PRI
f V
L
and L
SEC
=
=
OUT
V
2
1
EN
OUT
SEC
. Minimum power delivered to
L
(
SEC
t
f
ED
refer to transformer induc-
I
OUT
+
[
V
t
OUT
EN
)
2
where
(
t
EN
ED
LT1725
+
, plus the
t
ED
19
)
]
1725fa
2

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