LTC1266CS-5#TR Linear Technology, LTC1266CS-5#TR Datasheet - Page 11

• Manufacturer Part Number: LTC1266CS-5#TR
• Description: IC CTRLR SW REG SYNC 5V 16SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck), Step-Up (Boost)r

Specifications of LTC1266CS-5#TR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 5V
• Current - Output: 50mA
• Frequency - Switching: 400kHz
• Voltage - Input: 3.5 ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
From the duty cycles, the required R
MOSFET can be derived:
where P
and P
requirements (see Efficiency Considerations). For a MOSFET,
(1 + ) is generally given in the form of a normalized
R
voltage MOSFETs.
The minimum input voltage determines whether standard
threshold or logic-level threshold MOSFETs must be used.
For V
may be used. If V
level threshold MOSFETs (V
recommended. The LTC1266 series Power V
ways be less than the absolute maximum V
the MOSFETs.
The Schottky diode D1 shown in Figure 1 only conducts
during the deadtime between the conduction of the two
power MOSFETs. D1’s sole purpose in life is to prevent the
body diode of the bottom-side MOSFET from turning on
and storing charge during the deadtime, which could cost
as much as 1% in efficiency (although there are no other
harmful effects if D1 is omitted). Therefore, D1 should be
selected for a forward voltage of less than 0.7V when
conducting I
C
In continuous mode, the current through the topside
MOSFET is a square wave of duty cycle V
prevent large voltage transients, a low ESR (Effective
Series Resistance) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
T
NCH
IN
DS(ON)
and
TS R
BS R
C
and C
IN
IN
= 0.005/ C can be used as an approximation for low
B
Required I
> 8V, standard threshold MOSFETs (V
DS(ON)
B
DS(ON)
T
will be determined by efficiency and/or thermal
vs temperature curve, but
are the temperature dependencies of R
and P
OUT
MAX
Selection
B
=
=
.
are the allowable power dissipations and
IN
RMS
V
U
(V
is expected to drop below 8V, logic-
OUT
IN
– V
I
• I
U
MAX
V
MAX
OUT
IN
GS(TH)
[V
V
• P
2
) • I
IN
OUT
• (1 +
T
W
• P
MAX
< 2.5V) are strongly
PCH
(V
B
IN
2
DS(ON)
V
= 0.007/ C and
T
• (1 +
– V
IN
)
GS
OUT
GS(TH)
OUT
IN
ratings for
U
DS(ON)
for each
must al-
/V
)]
B
IN
)
1/2
< 4V)
. To
. P
T
This formula has a maximum at V
I
monly used for design because even significant devia-
tions do not offer much relief. Note that capacitor
manufacturer’s ripple current ratings are often based on
only 2000 hours of life. This makes it advisable to further
derate the capacitor, or to choose a capacitor rated at a
higher temperature than required. Always consult the
manufacturer if there is any question. An additional 0.1 F
to 1 F ceramic capacitor is also required on Power V
(Pin 2) for high frequency decoupling.
The selection of C
ESR of C
for proper operation of the LTC1266 series:
Optimum efficiency is obtained by making the ESR equal
to R
efficiency degrades by less than 1%. If the ESR is greater
than 2R
will prematurely trigger Burst Mode operation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent. If Burst Mode operation is dis-
abled, the ESR requirement can be relaxed and is limited
only by the allowable output voltage ripple.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR/size ratio of any aluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for C
rating generally far exceeds the I
In surface mount applications multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirements of the application. An
excellent choice is the AVX TPS series of surface mount
tantalums.
At low supply voltages, a minimum capacitance at C
is needed to prevent an abnormal low frequency oper-
ating mode (see Figure 4). When C
small, the output ripple at low frequencies will be large
enough to trip the voltage comparator. This causes
Burst Mode operation to be activated when the LTC1266
RMS
C
SENSE
OUT
= I
OUT
SENSE
OUT
Required ESR < 2R
. As the ESR is increased up to 2R
/2. This simple worst-case condition is com-
must be less than twice the value of R
, the voltage ripple on the output capacitor
LTC1266-3.3/LTC1266-5
OUT
OUT
is driven by the required ESR. The
has been met, the RMS current
SENSE
RIPPLE(P-P)
IN
OUT
= 2V
LTC1266
is made too
requirement.
OUT
SENSE
, where
11
SENSE
, the
OUT
IN