LT1956IGN#PBF Linear Technology, LT1956IGN#PBF Datasheet - Page 20

• Manufacturer Part Number: LT1956IGN#PBF
• Description: IC SW REG STP-DWN HI VOLT 16SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT1956IGN#PBF

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.2 ~ 45 V
• Current - Output: 1.5A
• Frequency - Switching: 500kHz
• Voltage - Input: 5.5 ~ 60 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP
• Primary Input Voltage: 60V
• No. Of Outputs: 1
• Output Current: 1.2A
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +125°C
• Msl: MSL 1 - Unlimited
• Supply Voltage Range: 5.5V To 60V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

LT1956/LT1956-5
APPLICATIO S I FOR ATIO
Note: Some of the internal power dissipation in the IC, due
to BOOST pin voltage, can be transferred outside of the IC
to reduce junction temperature by increasing the voltage
drop in the path of the boost diode D2 (see Figure 9). This
reduction of junction temperature inside the IC will allow
higher ambient temperature operation for a given set of
conditions. BOOST pin circuitry dissipates power given by:
Typically, V
equals V
considered almost equal, where:
Hence, the equation for boost circuitry power dissipation
given in the previous Thermal Calculations section, is
stated as:
Here it can be seen that boost power dissipation increases
as the square of V
V
the voltage drop in the path of D2. Care should be taken
that V
voltage required for full saturation of the internal power
switch. For output voltages of 5V, V
During switch turn on, V
C2 is discharged by the BOOST pin. In the previous BOOST
Pin section, the value of C2 was designed for a 0.7V droop
in V
would still allow the minimum 3.3V for the boost function
using the C2 capacitor calculated.
If a target output voltage of 12V is required, however, an
excess of 8V is placed across the boost capacitor which is
not required for the boost function but still dissipates
additional power.
What is required is a voltage drop in the path of D2 to
achieve minimal power dissipation while still maintaining
minimum boost voltage across C2.
20
C2
P
P
V
C2
DISS
DISS BOOST
below V
C2
C2
(= V
= V
(
OUT
(BOOST Pin)
does not fall below the minimum 3.3V boost
DROOP
OUT
C2
. This is because diodes D1 and D2 can be
OUT
(the boost voltage across the capacitor C2)
– V
)
to save power dissipation by increasing
). Hence, an output voltage as low as 4V
OUT
F
V
U
(D2) – [–V
OUT
. It is possible, however, to reduce
C2
•
V
U
OUT
I
will fall as the boost capacitor
SW
V
F
IN
(D1)] = V
/
•
36
I
SW
C2
W
V
IN
•
is approximately 5V.
V
/
36
OUT
OUT
•
V
.
C
2
U
A zener, D4, placed in series with D2 (see Figure 9), drops
voltage to C2.
Example:
The BOOST pin power dissipation for a 20V input to 12V
output conversion at 1A is given by:
If a 7V zener is placed in series with D2, then power
dissipation becomes:
For an FE package with thermal resistance of 45 C/W,
ambient temperature savings would be:
For a GN package with thermal resistance of 85 C/W,
ambient temperature savings would be:
The 7V zener should be sized for excess of 0.116W
operation. The tolerances of the zener should be consid-
ered to ensure minimum V
V
IN
T (ambient) savings = 0.116W • 45 C/W = 5 C
P
P
T (ambient) savings = 0.116W • 85 C/W = 10 C
BOOST
BOOST
C3
Figure 9. BOOST Pin, Diode Selection
12 1 36 12
12 1 36 5
V
SHDN
SYNC
GND
IN
• /
• /
20
20
LT1956
BOOST
R
C
C
C
•
•
BOOST
BIAS
V
SW
C
FB
0 084
C
F
0 2
.
exceeds 3.3V + V
.
W
D1
W
C2
D2
D2
L1
D4
R1
R2
+
DROOP
C1
V
OUT
1956f
1956 F09
.