LTC1148LCS Linear Technology, LTC1148LCS Datasheet - Page 11

IC SW REG STEP-DWN HI-EFF 14SOIC

LTC1148LCS

Manufacturer Part Number
LTC1148LCS
Description
IC SW REG STEP-DWN HI-EFF 14SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1148LCS

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
Adjustable
Current - Output
50mA
Frequency - Switching
250kHz
Voltage - Input
3.5 ~ 20 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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Part Number:
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APPLICATIO S I FOR ATIO
In surface mount applications multiple capacitors may
have to be paralleled to meet the capacitance, ESR, or
RMS current handling requirements of the application.
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount configurations. In the
case of tantalum, it is critical that the capacitors are surge
tested for use in switching power supplies. An excellent
choice is the AVX TPS series of surface mount tantalums,
available in case heights ranging from 2mm to 4mm. For
example, if 200µF/10V is called for in an application
requiring 3mm height, two AVX 100µF/10V (P/N TPSD
107K010) could be used. Consult the manufacturer for
other specific recommendations.
At low supply voltages, a minimum capacitance at C
is needed to prevent an abnormal low frequency oper-
ating mode (see Figure 4). When C
small, the output ripple at low frequencies will be large
enough to trip the voltage comparator. This causes
Burst Mode operation to be activated when the LTC1148
series would normally be in continuous operation. The
effect is most pronounced with low values of R
and can be improved by operating at higher frequencies
with lower values of L. The output remains in regulation
at all times.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
1000
800
600
400
200
0
0
Figure 4. Minimum Value of C
1
U U
(V
IN
– V
L = 50µH
R
L = 25µH
R
R
SENSE
SENSE
2
OUT
SENSE
) VOLTAGE (V)
= 0.02Ω
= 0.02Ω
L = 50µH
= 0.05Ω
3
W
4
LTC1148 • F04
OUT
OUT
5
is made too
U
SENSE
OUT
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
amount equal to ∆I
series resistance of C
or discharge C
current change and returns V
value. During this recovery time V
for overshoot or ringing which would indicate a stability
problem. The Pin 6 external components shown in the
Figure 1 circuit will prove adequate compensation for
most applications.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately 25 • C
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
where L1, L2, etc., are the individual losses as a percent-
age of input power. (For high efficiency circuits only small
errors are incurred by expressing losses as a percentage
of output power).
Although all dissipative elements in the circuit produce
losses, three main sources usually account for most of the
losses in LTC1148 series circuits: 1) LTC1148 DC bias
current, 2) MOSFET gate charge current, and 3) I
losses.
1. The DC supply current is the current which flows into
%Efficiency = 100% – (L1 + L2 + L3 + ...)
V
IN
OUT
Pin 3 less the gate charge current. For V
, causing a rapid drop in V
LTC1148-3.3/LTC1148-5
OUT
LOAD
until the regulator loop adapts to the
OUT
• ESR, where ESR is the effective
. ∆I
LOAD
OUT
OUT
also begins to charge
OUT
to its steady state
can be monitored
. No regulator can
OUT
LTC1148
shifts by an
IN
= 10V the
11
114835fd
LOAD
2
R
.

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