LTC3728LEUH#TRPBF Linear Technology, LTC3728LEUH#TRPBF Datasheet - Page 29

• Manufacturer Part Number: LTC3728LEUH#TRPBF
• Description: IC REG SW DUAL 2PH STPDWN 32QFN
• Manufacturer: Linear Technology
• Series: PolyPhase®r
• Type: Step-Down (Buck)r

Specifications of LTC3728LEUH#TRPBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 ~ 7 V
• Current - Output: 3A
• Frequency - Switching: 250kHz ~ 550kHz
• Voltage - Input: 4.5 ~ 28 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 10. Figure 11 illustrates the cur-
rent waveforms present in the various branches of the
2-phase synchronous regulators operating in the continu-
ous mode. Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M3 located with-
2. Are the signal and power grounds kept separate? The
in 1cm of each other with a common drain connection at
C
two channels as it can cause a large resonant loop.
combined IC signal ground pin and the ground return
IN
? Do not attempt to split the input decoupling for the
R1
R3
R2
R4
INTV
3.3V
Figure 10. LTC3728L/LTC3728LX Recommended Printed Circuit Layout Diagram
CC
f
IN
RUN/SS1
SENSE1
SENSE1
V
PLLFLTR
PLLIN
FCB
I
SGND
3.3V
I
V
SENSE2
SENSE2
LTC3728L/LTC3728LX
TH1
TH2
OSENSE1
OSENSE2
OUT
+
–
–
+
RUN/SS2
BOOST1
BOOST2
EXTV
PGOOD
INTV
PGND
SW1
SW2
BG1
BG2
TG1
TG2
V
CC
CC
IN
3. Do the LTC3728L/LTC3728LX V
of C
nals. The path formed by the top N-channel MOSFET,
Schottky diode and the C
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop just described.
dividers connect to the (+) terminals of C
tive divider must be connected between the (+) terminal
of C
should not be along the high current input feeds from
the input capacitor(s).
R
PGOOD
PU
C
C
INTVCC
OUT
C
B1
B2
INTVCC
V
(<7V)
and signal ground. The R2 and R4 connections
PULL-UP
must return to the combined C
LTC3728L/LTC3728LX
CERAMIC
C
VIN
V
R
M1
M3
IN
IN
1μF
CERAMIC
M2
M4
1μF
C
L1
L2
IN
IN
capacitor should have short
R
R
OSENSE
SENSE
SENSE
C
C
D1
OUT1
OUT2
D2
OUT
3728 F10
pins’ resistive
OUT
? The resis-
V
GND
V
(–) termi-
OUT1
OUT2
29
3728lxfe