NCP1443FR4 ON Semiconductor, NCP1443FR4 Datasheet - Page 14

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NCP1443FR4

Manufacturer Part Number
NCP1443FR4
Description
IC REG 4A 280KHZ NEG POWERFLEX7
Manufacturer
ON Semiconductor
Type
Step-Up (Boost), Inverting, Flyback, Forward Converter, Sepicr
Datasheet

Specifications of NCP1443FR4

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
Adjustable
Current - Output
4A
Frequency - Switching
280kHz
Voltage - Input
2.7 ~ 30 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
Powerflex-7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Other names
NCP1443FR4OSTR
current I
ripple can be calculated by:
terms of V
follows:
circuits, similar equations can be derived for flyback
circuits.
Reducing the Current Limit
limit on the switch current than 4.0 A. An external shunt can
be connected between the V
clamp voltage. Consequently, the current limit of the
internal power transistor current is reduced from its nominal
value.
equation:
where:
only available method for limiting switch current below
4.0 A is to clamp the V
maximum switch or inductor current is substituted into the
equation above, the desired clamp voltage will result.
V
Unfortunately, such a simple circuit is not generally
acceptable if V
V OUT(RIPPLE) +
C
The equation can be expressed more conveniently in
The capacitor RMS ripple current is:
Although the above equations apply only for boost
In some applications, the designer may prefer a lower
The voltage on the V
R
A
Since R
A simple diode clamp, as shown in Figure 36, clamps the
V OUT(RIPPLE) +
V
voltage to a diode drop above the voltage on resistor R3.
E
I RIPPLE + (I IN * I OUT ) 2 (1 * D))(I OUT ) 2 (D)
= .015 W, the value of the internal emitter resistor;
= 5.0 V/V, the gain of the current sense amplifier.
IN
E
. Summing up, the output voltage peak−peak
CC
and A
+ I OUT
, V
IN
V
is loosely regulated.
OUT
)
I OUT (V OUT * V CC )
cannot be changed by the end user, the
V C + I SW R E A V
)
(I OUT )(V OUT )(ESR)
(I IN * I OUT) (1 * D)
and I
(C OUT )(f)
V OUT * V CC
C
I OUT D
(C OUT )(f)
C
(C OUT) (f)
pin can be evaluated with the
pin at a lower voltage. If the
C
OUT
V CC
V CC
pin and ground to reduce its
) I IN
for design purposes as
ESR
(C OUT )(f)
1
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14
externally measure the current through the switch using a
sense resistor. Such a circuit is illustrated in Figure 37.
V
where:
Figure 37. Current Limiting using a Current Sense
IN
Another solution to the current limiting problem is to
The switch current is limited to:
V
0.65 V.
Figure 36. Current Limiting using a Diode Clamp
BE(Q1)
+
V
IN
Q1
= the base−emitter voltage drop of Q1, typically
I SWITCH(PEAK) +
R2
R3
PGND AGND
R
SENSE
C3
R2
Resistor
D1
V
CC
V
C1
C
V
R SENSE
V BE(Q1)
C1
V
C
CC
R1
C2
R1
C2
Output
Ground

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