ADUM2400CRWZ Analog Devices Inc, ADUM2400CRWZ Datasheet - Page 18

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ADUM2400CRWZ

Manufacturer Part Number
ADUM2400CRWZ
Description
IC ISOLATOR DIGITAL QUAD 16SOIC
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet

Specifications of ADUM2400CRWZ

Propagation Delay
27ns
Inputs - Side 1/side 2
4/0
Number Of Channels
4
Isolation Rating
5000Vrms
Voltage - Supply
2.7 V ~ 5.5 V
Data Rate
120Mbps
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.5mm Width)
Operating Temperature
-40°C ~ 105°C
No. Of Channels
4
Supply Current
70mA
Supply Voltage Range
2.7V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
16
Operating Temperature Range
-40°C To +105°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADuM2400/ADuM2401/ADuM2402
APPLICATION INFORMATION
PC BOARD LAYOUT
The ADuM240x digital isolator requires no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins (see
Figure 17). Bypass capacitors are most conveniently connected
between Pin 1 and Pin 2 for V
for V
The total lead length between both ends of the capacitor and
the input power supply pin should not exceed 20 mm. Bypassing
between Pin 1 and Pin 8 and between Pin 9 and Pin 16 should
be considered unless the ground pair on each package side are
connected close to the package.
In applications involving high common-mode transients, ensure
that board coupling across the isolation barrier is minimized.
Furthermore, the board layout should be designed such that
any coupling that does occur equally affects all pins on a given
component side. Failure to ensure this could cause voltage
differentials between pins exceeding the device’s Absolute
Maximum Ratings, thereby leading to latch-up or permanent
damage.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the length of time
it takes for a logic signal to propagate through a component. The
propagation delay to a logic low output can differ from the
propagation delay to logic high.
Pulse width distortion is the maximum difference between these
two propagation delay values and is an indication of how
accurately the input signal’s timing is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs among channels within a single
ADuM240x component.
Propagation delay skew refers to the maximum amount the
propagation delay differs among multiple ADuM240x components
operated under the same conditions.
INPUT (V
OUTPUT (V
DD2
V
V
Ix
. The capacitor value should be between 0.01 μF and 0.1 μF.
IC/
ID/
)
GND
GND
V
Ox
Figure 17. Recommended Printed Circuit Board Layout
V
V
DD1
V
V
V
OC
OD
)
E1
IA
IB
1
1
Figure 18. Propagation Delay Parameters
t
PLH
DD1
and between Pin 15 and Pin 16
t
PHL
50%
50%
V
GND
V
V
V
V
V
GND
DD2
OA
OB
OC/
OD/
E2
V
V
2
2
IC
ID
Rev. C | Page 18 of 24
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent via the transformer to the decoder.
The decoder is bistable and is therefore either set or reset by the
pulses, indicating input logic transitions. In the absence of logic
transitions at the input for more than ~1 μs, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than approximately 5 μs, the input side
is assumed to be without power or nonfunctional; in which
case, the isolator output is forced to a default state (see Table 11)
by the watchdog timer circuit.
The limitation on the ADuM240x’s magnetic field immunity is
set by the condition in which induced voltage in the transformer’s
receiving coil is large enough to either falsely set or reset the
decoder. The following analysis defines the conditions under
which this can occur. The 3 V operating condition of the
ADuM240x is examined because it represents the most
susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r
Given the geometry of the receiving coil in the ADuM240x and
an imposed requirement that the induced voltage be at most
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated as shown in Figure 19.
n
is the radius of the n
V = (−dβ/dt)Σ∏r
0.001
Figure 19. Maximum Allowable External Magnetic Flux Density
0.01
100
0.1
10
1
1k
10k
MAGNETIC FIELD FREQUENCY (Hz)
n
2
th
; n = 1, 2,…, N
turn in the receiving coil (cm).
100k
1M
10M
100M

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