IL715-3E NVE, IL715-3E Datasheet - Page 6

HI-SPD 4CHANN COUPLER 16-SOIC LF

IL715-3E

Manufacturer Part Number
IL715-3E
Description
HI-SPD 4CHANN COUPLER 16-SOIC LF
Manufacturer
NVE
Series
IsoLoop®r
Datasheet

Specifications of IL715-3E

Inputs - Side 1/side 2
4/0
Number Of Channels
4
Isolation Rating
2500Vrms
Voltage - Supply
3 V ~ 5.5 V
Data Rate
110Mbps
Propagation Delay
12ns
Output Type
Logic
Package / Case
16-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 100°C
No. Of Channels
4
Supply Current
16µA
Supply Voltage Range
3V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
16
Operating Temperature Range
-40°C To +100°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
390-1063-5
IL715-3E
Q2264071
5 Volt Electrical Specifications
Electrical specifications are T
Notes (apply to both 3.3 V and 5 V specifications):
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Parameters
Input Quiescent Supply Current
Output Quiescent Supply Current
Logic Input Current
Logic High Output Voltage
Logic Low Output Voltage
Maximum Data Rate
Pulse Width
Propagation Delay Input to Output
(High to Low)
Propagation Delay Input to Output
(Low to High)
Pulse Width Distortion
Pulse Jitter
Propagation Delay Skew
Output Rise Time (10%−90%)
Output Fall Time (10%−90%)
Common Mode Transient Immunity
(Output Logic High or Logic Low)
Channel-to-Channel Skew
Dynamic Power Consumption
Power Frequency Magnetic Immunity
Pulse Magnetic Field Immunity
Damped Oscillatory Magnetic Field
Cross-axis Immunity Multiplier
Absolute maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not
guarantee performance.
PWD is defined as |t
t
CM
common mode input voltage that can be sustained while maintaining V
and falling common mode voltage edges.
Device is considered a two terminal device: pins 1–8 shorted and pins 9–16 shorted.
Dynamic power consumption is calculated per channel and is supplied by the channel’s input side power supply.
Minimum pulse width is the minimum value at which specified PWD is guaranteed.
The relevant test and measurement methods are given in the Electromagnetic Compatibility section on p. 7.
External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than to “pin-to-pin” (see diagram on p. 7).
65,535-bit pseudo-random binary signal (PRBS) NRZ bit pattern with no more than five consecutive 1s or 0s; 800 ps transition time.
PSK
IL715
IL716
IL717
IL715
IL716
IL717
is the magnitude of the worst-case difference in t
H
is the maximum common mode voltage slew rate that can be sustained while maintaining V
(10)
(7)
(2)
PHL
(3)
− t
min
(6)
PLH
to T
(9)
|. %PWD is equal to PWD divided by pulse width.
(4)
max
unless otherwise stated.
Magnetic Field Immunity
|CM
Symbol
PWD
H
I
I
V
V
H
PW
t
t
t
H
H
t
K
DD1
DD2
PHL
PLH
PSK
CSK
t
t
I
t
|,|CM
OSC
OH
PM
OL
R
J
F
PF
I
X
L
PHL
|
Switching Specifications
and/or t
DC Specifications
V
0.8 x V
DD
Min.
2800
4000
4000
−10
100
10
20
PLH
− 0.1
DD
(8)
between devices at 25°C.
6
(V
O
DD2
< 0.8 V. The common mode voltage slew rates apply to both rising
0.9 x V
= 5V, 3V<V
Typ.
3500
4500
4500
V
110
100
200
0.5
2.5
24
10
10
30
5
2
8
5
6
0
2
4
1
1
2
DD
DD
DD1
Max.
<5.5V)
340
0.1
0.8
30
12
10
15
15
IL715/IL716/IL717
6
6
3
9
3
6
3
3
3
O
> 0.8 V
μA/MHz
kV/µs
Units
Mbps
A/m
A/m
A/m
mA
mA
mA
mA
mA
µA
µA
ns
ns
ns
ps
ns
ns
ns
ns
DD
V
V
2
. CM
L
is the maximum
Test Conditions
I
I
I
I
C
50% Points, V
C
C
C
C
C
C
C
V
C
per channel
50Hz/60Hz
t
0.1Hz – 1MHz
p
O
O
O
O
L
L
L
L
L
L
L
L
L
cm
= 8µs
= −20 µA, V
= −4 mA, V
= 20 µA, V
= 4 mA, V
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 300 V
I
I
= V
I
O
= V
I
= V
= V
IL
IL
IH
IH

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