6N137-000E Avago Technologies US Inc., 6N137-000E Datasheet
6N137-000E
Specifications of 6N137-000E
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6N137-000E Summary of contents
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... HCNW137, HCNW2601, HCNW2611, HCPL-0600, HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661, HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661 High CMR, High Speed TTL Compatible Optocouplers Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description The 6N137, HCPL-26XX/06XX/4661, HCNW137/26X1 are optically coupled gates that combine a GaAsP light emit- ting diode and an integrated high gain photo detector ...
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... NO 1,000 50 12.5 [3] Notes: 1. Technical data are on separate Avago publications kV/µs with can be achieved using Avago application circuit Enable is available for single channel products only, except for HCPL-193X devices. 2 8-Pin DIP (300 Mil) Small-Outline SO-8 Single Dual Single Channel Channel Channel Package Package Package 6N137 HCPL-0600 HCPL-2630 HCPL-2601 HCPL-0601 HCPL-2631 HCPL-2611 HCPL-0611 HCPL-4661 HCPL-2602 [1] HCPL-2612 [1] HCPL-261A HCPL-061A [1] HCPL-263A [1] HCPL-261N ...
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... Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and RoHS compliant option will use ‘-XXXE’ . Schematic 6N137, HCPL-2601/2611 HCPL-0600/0601/0611 HCNW137, HCNW2601/2611 – 3 SHIELD USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5). 3 6N137 Schematic a Surface Gull Tape & Package Mount Wing Reel 300 mil X X DIP ...
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... Package Outline Drawings 8-pin DIP Package** (6N137, HCPL-2601/11/30/31, HCPL-4661) 9.65 ± 0.25 (0.380 ± 0.010 TYPE NUMBER A XXXXZ YYWW 1.19 (0.047) MAX. 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) **JEDEC Registered Data (for 6N137 only). 8-pin DIP Package with Gull Wing Surface Mount Option 300 (6N137, HCPL-2601/11/30/31, HCPL-4661) 9.65 ± ...
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Small-Outline SO-8 Package (HCPL-0600/01/11/30/31/61 XXX 3.937 ± 0.127 YWW (0.155 ± 0.005 PIN ONE 0.406 ± 0.076 (0.016 ± 0.003) * 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.125 ± 0.005) * ...
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Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW137, HCNW2601/11) 11.15 ± 0.15 (0.442 ± 0.006 1.78 ± 0.15 (0.070 ± 0.006) 2.54 (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY ...
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... PEAK TIME NOTES: THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX 200 ° 150 °C smax smin Note: Non-halide flux should be used. Regulatory Information The 6N137, HCPL-26XX/06XX/46XX, and HCNW137/26XX have been ap- proved by the following organiza- tions: Insulation and Safety Related Specifications Parameter Symbol Minimum External L(101) Air Gap (External ...
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IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCPL-06xx Option 060 Only) Description Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 150 V rms for rated mains voltage ≤ 300 V rms for rated mains voltage ≤ 600 V rms Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage Input to Output Test Voltage, Method 1.875 = V , 100% Production Test with t IORM PR Partial Discharge < Input to Output Test Voltage, Method 1 Type and Sample Test, IORM sec, Partial Discharge < Highest Allowable Overvoltage (Transient Overvoltage sec) ini Safety Limiting Values (Maximum values allowed in the event of a failure) ...
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IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCPL-26xx; 46xx; 6N13x Option 060 Only) Description Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 300 V rms for rated mains voltage ≤ 450 V rms Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage Input to Output Test Voltage, Method 1.875 = V , 100% Production Test with t IORM PR Partial Discharge < Input to Output Test Voltage, Method 1 Type and sample test, IORM sec, Partial Discharge < Highest Allowable Overvoltage* (Transient Overvoltage sec) ini Safety Limiting Values ...
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... Exceed V by more than CC 500 mV) Enable Input Current Output Collector Current Output Collector Voltage Output Collector Power Dissipation Lead Solder Temperature (Through Hole Parts Only) Solder Reflow Temperature Profile (Surface Mount Parts Only) *JEDEC Registered Data (for 6N137 only). **Ratings apply to all devices except otherwise noted in the Package column. †0°C to 70°C on JEDEC Registration. Recommended Operating Conditions Parameter Input Current, Low Level Input Current, High Level [1] Power Supply Voltage Low Level Enable Voltage† High Level Enable Voltage† Operating Temperature Fan Out ( kΩ) [1] L Output Pull-up Resistor *The off condition can also be guaranteed by ensuring that V **The initial switching threshold less ...
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... R Breakdown SO-8 Voltage Widebody Input Diode DV / 8-Pin DIP F Temperature ∆T SO-8 A Coefficient Widebody Input Capacitance C 8-Pin DIP IN SO-8 Widebody *JEDEC registered data for the 6N137. The JEDEC Registration specifies 0°C to +70°C. HP specifies -40°C to +85° -40°C to +85°C) unless otherwise specified. All Typicals Min. Typ. Max. All 5.5 100 2.0 5.0 2.5 0.35 0.6 0.4 ...
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... Output Fall t f Time (90-10%) Propagation Delay t Single Channel ELH Time of Enable from Propagation Delay t Single Channel EHL Time of Enable from *JEDEC registered data for the 6N137. **Ratings apply to all devices except otherwise noted in the Package column. Parameter Sym. Device Logic High |CM | 6N137 H Common HCPL-2630 Mode HCPL-0600/0630 Transient HCNW137 Immunity HCPL-2601/2631 HCPL-0601/0631 HCNW2601 HCPL-2611/4661 HCPL-0611/0661 HCNW2611 Logic Low |CM | 6N137 L Common ...
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... Derate linearly above 80°C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package. 5. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm. 6. The JEDEC registration for the 6N137 specifies a maximum I 7. The JEDEC registration for the 6N137 specifies a maximum I 8. The JEDEC registration for the 6N137 specifies a maximum I 9. The JEDEC registration for the 6N137 specifies a maximum I 10 propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the PLH output pulse. ...
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... FORWARD INPUT CURRENT – Figure 2. Typical output voltage vs. forward input current. 6N137 fig 2a WIDEBODY 5 0 350 Ω KΩ KΩ -60 -40 - 100 60 T – TEMPERATURE – °C A 6N137 fig 3b WIDEBODY ° 350 Ω KΩ KΩ – FORWARD INPUT CURRENT – 6N137 fig 2b ...
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... FORWARD VOLTAGE - V F WIDEBODY -2.3 -2.2 -2.1 -2.0 -1.9 -1.8 0 100 I – PULSE INPUT CURRENT – 6N137 fig 5 FOR SINGLE 2.0 V* CHANNEL 0.6 V PRODUCTS ONLY 10- 5 -60 -40 - 100 60 T – TEMPERATURE – °C A Figure 5. Typical low level output current vs. tem- perature. 6N137 fig 5 ...
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... kΩ 300 L 290 kΩ 350 Ω 350 Ω, 1 kΩ, 4 kΩ 100 -60 -40 - – TEMPERATURE – °C A Figure 12. Typical rise and fall time vs. temperature. 6N137 fig 12 DUAL CHANNEL 0.1µF BYPASS GND 6N137 fig 8b 1 RISE t FALL 80 100 ...
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... 0.1 µ BYPASS L OUTPUT V O MONITORING 6 NODE 5 V (PEAK SWITCH (MIN.) O SWITCH 7 (MAX 0.5 V 6N137 fig 15c 3 EHL ELH 1.5 V DUAL CHANNEL GND – PULSE GENERATOR Ω 6N137 fig 15b OUTPUT V O MONITORING NODE 0.1 µF BYPASS ...
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... Figure 17. Recommended printed circuit board layout. 6N137 fig 17 18 HCNWXXXX P (mW (mA) S 800 700 600 500 400 300 200 100 100 125 150 T – CASE TEMPERATURE – °C S 6N137 fig 16b GND BUS (BACK) ENABLE OUTPUT SINGLE CHANNEL DEVICE ILLUSTRATED. 175 ...
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... D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT. DUAL CHANNEL DEVICE CHANNEL 1 SHOWN CC1 470 Ω D1 – GND 1 SHIELD 1 Figure 18. Recommended TTL/LSTTL to TTL/LSTTL interface circuit. SINGLE CHANNEL DEVICE 8 390 Ω 6 0.1 µF BYPASS 6N137 fig 18a 390 Ω 7 0.1 µF BYPASS 5 6N137 fig 18b CC2 GND CC2 GND 2 2 ...
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Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew Propagation delay is a figure of merit which describes how quickly a logic signal propagates through a sys- tem. The propagation delay from low to high (t amount of time required for an input signal to propagate to the output, causing the output to change from low to high. Similarly, the propagation delay from high to low ( the amount of time required for the input signal PHL to propagate to the output causing the output to change from high to low (see Figure 8). Pulse-width distortion (PWD) results when ...
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... Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0559EN AV02-0170EN - November 6, 2007 DATA INPUTS CLOCK DATA OUTPUTS CLOCK . Figure 20. Parallel data transmission example. PSK www.avagotech.com t PSK t PSK 6N137 fig 20 ...