HCPL-0723-500 Avago Technologies US Inc., HCPL-0723-500 Datasheet - Page 11

• Manufacturer Part Number: HCPL-0723-500
• Description: OPTOCOUPLER 50MBD 2NS 8-SOIC
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-0723-500

• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 10mA
• Data Rate: 50MBd
• Propagation Delay High - Low @ If: 16ns
• Input Type: Logic
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Surface Mount
• Isolation Voltage: 3750 Vrms
• Maximum Continuous Output Current: 10 mA
• Maximum Fall Time: 6 ns
• Maximum Rise Time: 8 ns
• Output Device: Logic Gate Photo IC
• Configuration: 1 Channel
• Maximum Baud Rate: 50 MBps
• Maximum Power Dissipation: 150 mW
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pulse-width distortion (PWD) is the difference between
t
rate capability of a transmission system. PWD can be
expressed in percent by dividing the PWD (in ns) by the
minimum pulse width (in ns) being transmitted. Typically,
PWD on the order of 20-30% of the minimum pulse width
is tolerable.
Propagation delay skew, t
to consider in parallel data applications where synchro-
nization of signals on parallel data lines is a concern. If
the parallel data is being sent through a group of op-
tocouplers, differences in propagation delays will cause
the data to arrive at the outputs of the optocouplers at
different times. If this difference in propagation delay
is large enough it will determine the maximum rate at
which parallel data can be sent through the optocou-
plers.
Propagation delay skew is defined as the difference
between the minimum and maximum propagation
delays, either t
plers which are operating under the same conditions (i.e.,
the same drive current, supply voltage, output load, and
operating temperature). As illustrated in Figure 4, if the
inputs of a group of optocouplers are switched either ON
or OFF at the same time, t
the shortest propagation delay, either t
the longest propagation delay, either t
Figure 4. Timing diagram to illustrate propagation delay skew, tpsk.
PHL
V
V
and t
V
V
O
O
I
I
PLH
and often determines the maximum data
PLH
50%
50%
CMOS
or t
2.5 V,
PHL
, for any given group of optocou-
PSK
PSK
t
PSK
, is an important parameter
is the difference between
2.5 V,
CMOS
PLH
PLH
or t
or t
PHL
PHL
.
, and
As mentioned earlier, t
parallel data transmission rate. Figure 5 is the timing
diagram of a typical parallel data application with both
the clock and data lines being sent through the opto-
couplers. The figure shows data and clock signals at the
inputs and outputs of the optocouplers. In this case the
data is assumed to be clocked off of the rising edge of
the clock.
Propagation delay skew represents the uncertainty of
where an edge might be after being sent through an op-
tocoupler. Figure 5 shows that there will be uncertainty
in both the data and clock lines. It is important that these
two areas of uncertainty not overlap, otherwise the clock
signal might arrive before all of the data outputs have
settled, or some of the data outputs may start to change
before the clock signal has arrived. From these consid-
erations, the absolute minimum pulse width that can
be sent through optocouplers in a parallel application is
twice t
pulse width to ensure that any additional uncertainty in
the rest of the circuit does not cause a problem.
The HCPL-7723/0723 optocouplers offer the advantage of
guaranteed specifications for propagation delays, pulse-
width distortion, and propagation delay skew over the
recommended temperature and power supply ranges.
Figure 5. Parallel data transmission example.
INPUTS
OUTPUTS
PSK
CLOCK
CLOCK
. A cautious design should use a slightly longer
DATA
DATA
t
PSK
PSK
can determine the maximum
t
PSK