ACPL-K73L-000E Avago Technologies US Inc., ACPL-K73L-000E Datasheet

OPTOCOUPLER 1CH 15MBD CMOS 8SSOP

ACPL-K73L-000E

Manufacturer Part Number
ACPL-K73L-000E
Description
OPTOCOUPLER 1CH 15MBD CMOS 8SSOP
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ACPL-K73L-000E

Input Type
DC
Isolation Voltage
5000 Vrms
Maximum Continuous Output Current
10 mA
Maximum Fall Time
3500 us
Maximum Forward Diode Current
10 mA
Maximum Rise Time
3.5 ns
Minimum Forward Diode Voltage
1.2 V
Output Device
Logic Gate Photo IC
Configuration
2 Channel
Maximum Baud Rate
15 MBd (Min)
Maximum Forward Diode Voltage
1.85 V
Maximum Reverse Diode Voltage
5 V (Min)
Maximum Power Dissipation
600 mW
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Package / Case
SO Stretched
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Description
The ACPL-W70L (single-channel) and ACPL-K73L (dual-
channel) are 15 MBd CMOS optocouplers in SSOIC-6 and
SSOIC-8 package respectively. The optocouplers utilize the
latest CMOS IC technology to achieve outstanding perfor-
mance with very low power consumption. Basic building
blocks of ACPL-W70L and ACPL-K73L are high speed LEDs
and CMOS detector ICs. Each detector incorporates an in-
tegrated photodiode, a high speed transimpedance am-
plifier, and a voltage comparator with an output driver.
Component Image
A 0.1
ACPL-W70L and pins 5 and 8 for ACPL-K73L.
ACPL-W70L-000E and ACPL-K73L-000E
Single-channel and Dual-channel High Speed 15 MBd
CMOS optocoupler with Glitch-Free Power-Up Feature
Data Sheet
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Cathode1
Cathode2
P
Cathode
Anode1
Anode2
F bypass capacitor must be connected between pins 4 and 6 for
Anode
NC*
Lead (Pb) Free
RoHS 6 fully
compliant
1
2
3
4
1
2
3
SHIELD
LED
OFF
ON
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
SHIELD
TRUTH TABLE
ACPL-W70L
ACPL-K73L
V
L
H
O
, OUTPUT
6
5
4
8
7
6
5
GND
GND
V
Vo
V
Vo
Vo
DD
DD
1
2
Features
x +3.3V and 5 V CMOS compatibility
x 25ns max. pulse width distortion
x 55ns max. propagation delay
x 40ns max. propagation delay skew
x High speed: 15 MBd min
x 10 kV/μs minimum common mode rejection
x –40 to 105°C temperature range
x Glitch-Free Power-UP Feature
x Safety and regulatory approvals:
Applications
x Digital field bus isolation:
x Multiplexed data transmission
x Computer peripheral interface
x Microprocessor system interface
x DC/DC converter
- UL recognized: 5000 V rms for 1 min. per UL 1577
- CSA component acceptance Notice #5
- IEC/EN/DIN EN 60747-5-2 approved Option 060
- CANBus, RS485, USB

Related parts for ACPL-K73L-000E

ACPL-K73L-000E Summary of contents

Page 1

... ACPL-W70L-000E and ACPL-K73L-000E Single-channel and Dual-channel High Speed 15 MBd CMOS optocoupler with Glitch-Free Power-Up Feature Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description The ACPL-W70L (single-channel) and ACPL-K73L (dual- channel) are 15 MBd CMOS optocouplers in SSOIC-6 and SSOIC-8 package respectively ...

Page 2

... To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-W70L-500E to order product of stretched SO-6 package in Tape and Reel packaging in RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. 2 for 1 minute per UL1577 ...

Page 3

... ACPL-K73L (Stretched S0-8 Package) 0.381 0.13 (0.015 0.005 0.450 (0.018) 45 0.200 0.100 (0.008 0.004) 6.807 0.127 (0.268 0.005) 0.750 0.250 (0.0295 0.010) 11 ...

Page 4

... SOLDERING 30 SEC. 30 SEC. 50 SEC. 100 150 TIME (SECONDS) Regulatory Information The ACPL-W70L and ACPL-K73L are approved by the fol- lowing organizations 20-40 SEC. UL Recognized under UL 1577, component recognition pro- gram, File E55361. RAMP-DOWN 6 °C/SEC. MAX. CSA Approved under CSA Component Acceptance Notice #5, File CA88324 ...

Page 5

Parameter Symbol Minimum External Air L(I01) Gap (Clearance) Minimum External L(I02) Tracking (Creepage) Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance CTI (Comparative Tracking Index) Isolation Group All Avago Technologies data sheets report the creepage and clearance inherent to the ...

Page 6

... Logic High Output V OH Voltage Logic Low Output V OL Voltage Input Threshold I TH Current Logic Low Output I ACPL-W70L DDL Supply Current ACPL-K73L Logic Low Output I ACPL-W70L DDH Supply Current ACPL-K73L 6 Symbol Min. T – – –0 260°C for 10 sec., 1.6 mm below seating plane See Solder Refl ...

Page 7

Switching Specifications Over recommended temperature (T All typical specifications are at T =+25° Parameter Propagation Delay Time [2] to Logic Low Output Propagation Delay Time [2] to Logic High Output Pulse Width [3] Pulse Width Distortion [4] Propagation ...

Page 8

... Figure 2. Typical input threshold current vs. temperature = =3. 100 -40 Figure 4. Typical logic low output supply current vs. temperature for dual channel (ACPL-K73L CH1 PHL CH1 15 PLH 10 |PWD| CH2 Figure 6. Typical switching speed vs. pulse input current at 3.3V supply voltage I ...

Page 9

... F Application Information Bypassing and PC Board Layout The ACPL-W70L and ACPL-K73L optocouplers are ex- tremely easy to use. ACPL-W70L and ACPL-K73L provide CMOS logic output due to the high-speed CMOS IC tech- nology used. The external components required for proper operation are the input limiting resistor and the output bypass ca- pacitor. Capacitor values should be between 0.01 μ ...

Page 10

... GND 1 Vo GND ACPL-K73L C=0.01μF to 0.1μF DATA INPUTS CLOCK DATA OUTPUTS CLOCK 2.5 V, CMOS Figure 10. Parallel data transmission example. Figure 10 shows that there will be uncertainty in both the data and the clock lines important that these two ar- can de- eas of uncertainty not overlap, otherwise the clock signal ...

Page 11

... To limit the amount of current flowing through the LED recommended that a 530ohm resistor is connected in series with anode of LED (i.e. Pin 1 for ACPL-W70L, Pin 1 and P4 for ACPL-K73L input signal. At 3.3V input signal recommended to connect 250ohm resistor in series with anode of LED ...

Page 12

... I is close to the switching threshold ( also depends on the extent which I L 1/2R V DD1 1/2R 74LS04 OR ANY TOTEM- POLE OUTPUT LOGIC GATE GND 1 Figure 13. Recommended drive circuit for ACPL-W70L and ACPL-K73L for high-CMR ½ R total ½ R total SHIELD Figure 14. AC equivalent of ACPL-W70L and ACPL-K73L 12 each other ...

Page 13

... FH recommendation. Using any one of the drive circuits in Figures 15-17 with will result in a typical CMR of 10 kV/μs for ACPL- F W70L AND ACPL-K73L, as long as the PC board layout practices are followed. Figure 15 shows a circuit which can be used with any totem-pole-output TTL/LSTTL/HCMOS logic gate. The buffer PNP transistor allows the circuit to be used with logic devices which have low current-sinking capability ...

Page 14

R limit SHIELD + Pulse Gen SWITCH (min.) SWITCH ...

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