HCPL-5431 Avago Technologies US Inc., HCPL-5431 Datasheet - Page 8

• Manufacturer Part Number: HCPL-5431
• Description: OPTOCOUPLER 2CH CLASS H 8DIP
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-5431

• Package / Case: 8-DIP (0.300", 7.62mm)
• Voltage - Isolation: 1500VDC
• Number Of Channels: 2, Unidirectional
• Current - Output / Channel: 25mA
• Data Rate: 40Mbps
• Propagation Delay High - Low @ If: 33ns @ 10mA
• Current - Dc Forward (if): 10mA
• Input Type: DC
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Through Hole
• Maximum Continuous Output Current: 25 mA
• Maximum Fall Time: 10 ns
• Maximum Forward Diode Current: 10 mA
• Maximum Rise Time: 15 ns
• Minimum Forward Diode Voltage: 1 V
• Output Device: Logic Gate Photo IC
• Configuration: 2 Channel
• Maximum Baud Rate: 40 MBps
• Maximum Forward Diode Voltage: 1.85 V
• Maximum Reverse Diode Voltage: 3 V
• Maximum Power Dissipation: 200 mW
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Notes:
Figure 1. Typical logic low output voltage vs. logic
low output current
Figure 3. Typical output voltage vs. input
forward current
8
1. Not to exceed 5% duty factor, not to exceed 50 sec pulse width.
2. All devices are considered two-terminal devices: measured
3. This is a momentary withstand test, not an operating condition.
4. t
5. CM
6. Duration of output short circuit time not to exceed 10 ms.
7. Power Supply Noise Immunity is the peak to peak amplitude of
between all input leads or terminals shorted together and all
output leads or terminals shorted together.
rising edge of the input current pulse to the 1.5 V point on the
falling edge of the output pulse. The t
measured from the 50% point on the falling edge of the input
current pulse to the 1.5 V point on the rising edge of the output
pulse. Pulse Width Distortion, PWD = |t
can be sustained with the output voltage in the logic low state
(V
mode voltage that can be sustained with the output voltage in
the logic high state (V
PHL
O(MAX)
L
propagation delay is measured from the 50% point on the
is the maximum slew rate of the common mode voltage that
< 0.8 V). CM
H
O(MIN)
is the maximum slew rate of the common
> 2.0 V).
PHL
PLH
- t
PLH
propagation delay is
|.
10. Standard parts receive 100% testing at 25 C (Subgroups 1 and 9).
11. Parameters are tested as part of device initial characterization and
12. Propagation delay skew is defined as the difference between the
13. The HCPL-6430, HCPL-6431, and HCPL-643K dual channel parts
Figure 2. Typical logic high output voltage vs.
logic high output current
Figure 4. Typical diode input forward current
characteristic
8. Measured between adjacent input pairs shorted together for each
9. Each channel.
the ac ripple voltage on the V
and still remain in the desired logic state. For desired logic high
state, V
multichannel device.
SMD, Class H and Class K parts receive 100% testing at 25, 125,
and –55 C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).
after design and process changes. Parameters are guaranteed to
limits specified for all lots not specifically tested.
minimum and maximum propagation delays for any given group
of optocouplers with the same part number that are all switching
at the same time under the same operating conditions.
function as two independent single channel units. Use the single
channel parameter limits.
OH(MIN)
> 2.0 V, and for desired logic low state, V
CC
line that the device will withstand
OL(MAX)
< 0.8 V.