DS1922L-F5# Maxim Integrated Products, DS1922L-F5# Datasheet - Page 44

IBUTTON TEMP LOGGER

DS1922L-F5#

Manufacturer Part Number
DS1922L-F5#
Description
IBUTTON TEMP LOGGER
Manufacturer
Maxim Integrated Products
Series
iButton®r
Datasheet

Specifications of DS1922L-F5#

Rohs Information
IButton RoHS Compliance Plan
Memory Size
512B
Memory Type
NVSRAM (Non-Volatile SRAM)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS1922L-F5#
Manufacturer:
MAXIM/美信
Quantity:
20 000
Temperature Logger iButton with 8KB
Data-Log Memory
The DS1922L/DS1922T use two types of CRCs. One
CRC is an 8-bit type and is stored in the most signifi-
cant byte of the 64-bit ROM. The bus master can com-
pute a CRC value from the first 56 bits of the 64-bit
ROM and compare it to the value stored within the
DS1922L/DS1922T to determine if the ROM data has
been received error-free. The equivalent polynomial
function of this CRC is X
is received in the true (noninverted) form, and it is com-
puted at the factory and lasered into the ROM.
The other CRC is a 16-bit type, generated according to
the standardized CRC-16 polynomial function X
+ X
reading register pages or the data-log memory using
the Read Memory with CRC command and for fast veri-
fication of a data transfer when writing to or reading
from the scratchpad. In contrast to the 8-bit CRC, the
Figure 14. Noise Suppression Scheme
Figure 15. CRC-16 Hardware Description and Polynomial
44
2
X
______________________________________________________________________________________
8
+ 1. This CRC is used for error detection when
X
0
V
STAGE
PUP
V
9TH
TH
0V
STAGE
1ST
V
X
HY
9
X
1
STAGE
10TH
STAGE
2ND
8
X
10
+ X
CASE A
STAGE
11TH
5
CRC Generation
+ X
4
X
11
+ 1. This 8-bit CRC
X
2
STAGE
12TH
STAGE
3RD
X
POLYNOMIAL = X
12
X
16
3
STAGE
13TH
+ X
t
t
STAGE
REH
GL
4TH
15
X
CASE B
13
16
X
+ X
4
STAGE
14TH
15
16-bit CRC is always communicated in the inverted
form. A CRC generator inside the DS1922L/DS1922T
(Figure 15) calculates a new 16-bit CRC as shown in
the command flowchart of Figure 9. The bus master
compares the CRC value read from the device to the
one it calculates from the data and decides whether to
continue with an operation or to reread the portion of
the data with the CRC error. With the initial pass
through the Read Memory with CRC flowchart, the 16-
bit CRC value is the result of shifting the command byte
into the cleared CRC generator, followed by the two
address bytes and the data bytes. The password is
excluded from the CRC calculation. Subsequent pass-
es through the Read Memory with CRC flowchart gen-
erate a 16-bit CRC that is the result of clearing the CRC
generator and then shifting in the data bytes.
With the Write Scratchpad command, the CRC is gener-
ated by first clearing the CRC generator and then shift-
STAGE
+ X
5TH
2
+ 1
X
14
X
5
STAGE
15TH
STAGE
6TH
X
6
STAGE
7TH
t
REH
t
GL
X
15
X
INPUT DATA
7
STAGE
CASE C
16TH
STAGE
8TH
X
16
CRC OUTPUT

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