HFBR-57E0PZ Avago Technologies US Inc., HFBR-57E0PZ Datasheet
HFBR-57E0PZ
Specifications of HFBR-57E0PZ
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HFBR-57E0PZ Summary of contents
Page 1
... IC which converts differential PECL logic signals, ECL referenced (shifted +3.3 V supply, into an analog LED drive current. Receiver Section The receiver section of the HFBR-57E0 utilizes an InGaAs PIN photodiode coupled to a custom silicon transimpedance preamplifier IC packaged in the optical subassembly portion of the receiver. ...
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... HFBR-57E0. The connection diagram of the module is shown in Figure 2. Figures 5 and 7 depict the external configuration and dimensions of the module. Installation The HFBR-57E0 can be installed in or removed from any MultiSource Agreement (MSA) – compliant Small Form Pluggable port regardless of whether the host equipment OPTICAL INTERFACE ...
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... This protocol uses the 2-wire serial CMOS E2PROM protocol of the ATMEL AT24C01A or equivalent. The contents of the HFBR-57E0 serial ID memory are defined in Table 3 as specified in the SFP MSA. Functional Data I/O The HFBR-57E0 fiberoptic transceiver is designed to accept industry standard differential signals ...
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... Avago will be required to meet the requirements of FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The metal housing and shielded design of the HFBR-57E0 minimize the EMI challenge facing the host equipment designer. These transceivers provide superior EMI performance ...
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... SO+ 50 SO– 4 SerDes 10 µF 50 SI+ 50 SI– µH 1 µH 0.1 µF 10 µF 0.1 µF VccT HFBR-57E0 4 3 0.1 µF TD+ LED DRIVER & SAFETY TD– CIRCUITRY TX GND 0.1 µF 130 130 W VccR 3.3 V 0.1 130 130 µF 0.1 µF ...
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Table 2. Pin Description Pin Name Function/Description Transmitter Ground Disable Transmitter Disable- Module disables on high or open 4 MOD-DEF2 Module Definition 2 - Two Wire Serial ID Interface 5 MOD-DEF1 ...
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Table 3. EEPROM Serial ID Memory Contents Add Hex ASCII Add Note Note ...
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Table 3. EEPROM Serial ID Memory Contents (continued) Add Hex ASCII Add Notes: 1. Addresses specify a unique identifier. 2. Addresses specify ...
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... TRANSCEIVER CAGE 13.0±0.2 [0.512±0.008] AREA FOR PROCESS PLUG 6.6 [0.261] 13.50 [0.53] 14.8MAX. UNCOMPRESSED [0.583] AVAGO HFBR-57E0xxZ YYWW Country of Origin 13.4±0.1 [0.528±0.004] 55.2±0.2 [2.17±0.01] 0.7MAX. UNCOMPRESSED [0.028] 8.5±0.1 [0.335±0.004] DIMENSIONS ARE IN MILLIMETERS (INCHES) ...
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X Y 16.25 MIN. PITCH B PCB EDGE 5.68 8.58 11.08 16.25 REF . 14.25 2.0 11x 3 5 3.2 0.9 20 PIN 1 10.93 9.6 0.8 TYP . 1.55 ± 0.05 ∅ 0 ...
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PCB [1.64±.02] 15MAX .59 CAGE ASSEMBLY 12.4REF .49 9.8MAX .39 Figure 9. SFP Assembly Drawing 11 1.7±0.9 [.07±.04] AREA BEZEL FOR PROCESS PLUG Tcase REFERENCE POINT 10REF 1.15REF .39 .05 TO PCB BELOW PCB 0.4±0.1 [.02±0.004] BELOW ...
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... HFBR-57E0ALZ/APZ (T = -40 ºC to +85 º Parameter Supply Current Power Dissipation Transmitter Disable (TX Disable) High Transmitter Disable (TX Disable) Low Receiver Electrical Characteristics HFBR-57E0LZ/ ºC to +70 º HFBR-57E0ALZ/APZ (T = -40 ºC to +85 º Parameter Supply Current Power Dissipation Data Output: Receiver Differential Output Voltage ...
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... The ANSI T1E1.2 committee has designated the possibility of defining an eye pattern mask for the transmitter optical output as an item for further study. Avago will incorporate this requirement into the specifications for these products defined. The HFBR-57E0 products typically comply with the template requirements of CCITT (now ITU-T) G.957 Section 3.2.5, Figure 2 for the STM- 1 rate, excluding the optical receiver filter normally associated with single mode fiber measurements which is the likely source for the ANSI T1E1 ...
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... Random Jitter contributed by the transmitter is specified with an IDLE Line State, 125 MBd (62.5 MHz square-wave) input signal. See Application Information - Transceiver Jitter Performance Section of this data sheet for further details. Receiver Optical and Electrical Characteristics HFBR-57E0LZ /PZ ºC to +70 º HFBR-57E0ALZ/APZ (T = -40 ºC to +85 º Parameter Input Optical Power minimum at Window Edge OC-3 ...
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... Data Out and Data Out Bar go to steady PECL levels High and Low respectively. 21. The HFBR-57E0 transceiver complies with the requirements for the trade-offs between center wavelength, spectral width, and rise/fall times shown in Figure 3. This figure is derived from the FDDI PMD standard (ISO/IEC 9314-3 : 1990 and ANSI X3.166 - 1990) per the description in ANSI T1E1 ...
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... LED (Operating Case Temperature -40 °C to +85 °C) HFBR-57E0ALZ Standard de-latch HFBR-57E0APZ Bail de-latch EEPROM contents and/or label options HFBR-57E0LZ-YYY Standard de-latch +70°C HFBR-57E0PZ-YYY Bail de-latch +70°C HFBR-57E0ALZ-YYY Standard de-latch, -40°C to +85°C HFBR-57E0APZ-YYY Bail de-latch, -40°C to +85°C Where "YYY" is customer specific. Handling Precaution The HFBR-57E0xxZ is a pluggable module and is NOT designed for aqueous wash, IR reflow or wave soldering processes ...