LTM4603HVEV#PBF Linear Technology, LTM4603HVEV#PBF Datasheet - Page 18

IC DC/DC UMODULE 6A 118-LGA

LTM4603HVEV#PBF

Manufacturer Part Number
LTM4603HVEV#PBF
Description
IC DC/DC UMODULE 6A 118-LGA
Manufacturer
Linear Technology
Series
µModuler
Type
Point of Load (POL) Non-Isolatedr
Datasheet

Specifications of LTM4603HVEV#PBF

Design Resources
LTM4603HV Spice Model
Output
0.6 ~ 5 V
Number Of Outputs
1
Power (watts)
30W
Mounting Type
Surface Mount
Voltage - Input
4.5 ~ 28 V
Package / Case
118-LGA
1st Output
0.6 ~ 5 VDC @ 6A
Size / Dimension
0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
Power (watts) - Rated
30W
Operating Temperature
-40°C ~ 85°C
Efficiency
93%
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3rd Output
-
2nd Output
-

Available stocks

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Manufacturer
Quantity
Price
Company:
Part Number:
LTM4603HVEV#PBF
Manufacturer:
Linear Technology
Quantity:
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LTM4603HVEV#PBF
Manufacturer:
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Quantity:
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APPLICATIO S I FOR ATIO
LTM4603HV
Safety Considerations
The LTM4603HV modules do not provide isolation from
V
blow fuse with a rating twice the maximum input current
needs to be provided to protect each unit from catastrophic
failure.
Layout Checklist/Example
The high integration of LTM4603HV makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path, in-
• Place high frequency ceramic input and output capaci-
• Place a dedicated power ground layer underneath the
• To minimize the via conduction loss and reduce module
18
IN
cluding V
PCB conduction loss and thermal stress.
tors next to the V
high frequency noise.
unit.
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
to V
OUT
. There is no internal fuse. If required, a slow
IN
, PGND and V
U
IN
, PGND and V
U
OUT
. It helps to minimize the
W
OUT
V
GND
V
OUT
IN
pins to minimize
C
OUT
Figure 17. Recommended Layout
C
IN
U
C
OUT
C
IN
• Do not put vias directly on pads.
• If vias are placed onto the pads, the the vias must be
• Interstitial via placement can also be used if necessary.
• Use a separated SGND ground copper area for com-
Figure 17 gives a good example of the recommended
layout.
Frequency Adjustment
The LTM4603HV is designed to typically operate at 1MHz
across most input conditions. The f
open or decoupled with an optional 1000pF capacitor. The
switching frequency has been optimized for maintaining
constant output ripple noise over most operating ranges.
The 1MHz switching frequency and the 400ns minimum
off time can limit operation at higher duty cycles like 5V to
3.3V, and produce excessive inductor ripple currents for
lower duty cycle applications like 28V to 5V. The 5V and
3.3V drop out curves are modifi ed by adding an external
resistor on the f
operations.
capped.
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
4603HV F17
SET
pin to allow for wider input voltage
SIGNAL
GND
SET
pin is typically left
4603hvf

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