ATA6834-DK Atmel, ATA6834-DK Datasheet
ATA6834-DK
Specifications of ATA6834-DK
Related parts for ATA6834-DK
ATA6834-DK Summary of contents
Page 1
... The target applications are most suitable for the automotive market due to the robust tech- nology and the high qualification level. Atmel ATA6834, in particular, is designed for applications in a high-temperature environment. = 150° 200° ...
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... VCC 3.3/5V VCC Regulator DG1 Supervisor: DG2 Short Circuit Overtemperature DG3 Undervoltage /RESET WD IH1-3 IL1-3 RX LIN TX Hall A LIN Hall B Hall C Atmel ATA6833/ATA6834 [Preliminary] 2 CPHI1 CPHI2 VG CPLO1 CPLO2 13V CP Regulator VINT 5V VBG Regulator Logic Control Atmel ATA6833/34 WD Timer LINGND EN1 EN2 GND ...
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... Symbol 1 VMODE 2 VINT 3 RWD /RESET WDD 8 EN1 9 N.C. 10 N.C. 11 GND 12 LINGND 13 LIN TXD 16 IL3 17 IH3 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary VMODE 1 2 VINT RWD /RESET 5 Atmel YWW WD 6 ATA6833/ATA6834 WDD 7 ZZZZZ-AL EN1 GND 11 LINGND I/O Function I Selector for V CC I/O ...
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... PGND 44 VCC VBAT 47 EN2 48 VBATSW Atmel ATA6833/ATA6834 [Preliminary] 4 I/O Function I Control Input for output L2 I Control Input for output H2 I Control Input for output L1 I Control Input for output H1 O Receive signal from LIN bus for microcontroller O Diagnostic output 1 O Diagnostic output 2 ...
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... Mode) when it has cooled down below the shutdown threshold. When the junction temperature drops below the pre-warning threshold, bit DG3 will be switched LOW. 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary] ), the external NMOS motor driver transistors will be switched off. The failure state THUV THOV ...
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... Sleep Mode to Active Mode. The VCC regulator is activated and the internal LIN slave termination resistor is switched on. Figure 3-1. Atmel ATA6833/ATA6834 [Preliminary] 6 switches the IC to Active Mode. EN2 is debounced and edge triggered. BAT ) and ending with a rising edge leads to a remote wake-up request. The device switches ...
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... VCC ESR (C = 2.2µF) min VCC Load Current (mA) Figure 3-3. 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary the regulator is 100mA. For T OS1 150 /RESET as Function of the VCC Output Voltage VCC 100% VCC 88% VCC 80% VCC 0V /RESET ® > 150°C the I ...
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... Additional resets will be generated if the VCC output voltage drops below 80% of its nominal value. The following example demonstrates how to calculate the timing scheme for valid watchdog trigger pulses, which the external microcontroller has to provide in order to prevent undesired resets. Atmel ATA6833/ATA6834 [Preliminary Figure 3-4 shows the watchdog and external reset timing. ...
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... All capacitors should be ceramic advisable to pick a reservoir capacitor with twice or three-times the size of the two equally-sized shuffle capacitors. The greater the capacitors, the greater the output current capability. 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary ±1% results in typical parameters as follows 12.32µ 12.07ms ± ...
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... Table 3-1. Mode Sleep Active Active Active Active Atmel ATA6833/ATA6834 [Preliminary] 10 3-1). All pins are equipped with an internal pull-down resistor. To operate the output accepted. overvoltage is present. VCP . CPGOOD Status of the Output Drivers Depending on the Control Inputs ...
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... Any low to high transition at the control inputs will be masked out at the driver out- puts until the voltage at CC pin drops below 67% of its initial value (VINT). The timer will be re-triggered at any time by any falling edge at the control inputs. This is shown in the following figure. Figure 3-6. 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary (nF ...
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... Indicating Wake-up Source Diagnostic Outputs DG1 DG2 DG3 1 – – 0 – – ® ATA6833 and Atmel ATA6834 include a fully integrated LIN transceiver complying with . Otherwise all diagnostic outputs will be tristated. Diagnostic Outputs DG1 DG2 DG3 – 1 – Charge pump failure – – ...
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... LIN slave. If this IC is used as a LIN master, the LIN pin is terminated by an external 1 k resistor in series with a diode to VBAT. As PWM communication directly over the LIN transceiver in both directions is possible, there is no TXD timeout feature implemented in the LIN transceiver. 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary Bit Bit ...
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... Output voltage Storage temperature Note: Estimated values take T > 150°C into account Thermal Resistance Parameters Thermal resistance junction to heat slug Thermal resistance junction to ambient when heat slug is soldered to PCB Atmel ATA6833/ATA6834 [Preliminary] 14 ® ATA6834. Pin Symbol PGND V PGND VBAT IVBAT ...
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... Static latch-up tested according to AEC-Q100-004 and JESD78. • samples, 0 failures • Electrical post-stress testing at room temperature In test, the voltage at the pins VBAT, LIN, CP, VBATSW, Hx, and Sx must not exceed 45V when not able to drive the specified current. 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary] ® ATA6834 Symbol Min V 5 ...
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... MODE V MODE 2.2 Regulated output voltage I Load 150°C < Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6833/ATA6834 [Preliminary] 16 18V and for –40°C T 150°C (200°C) unless stated otherwise. All values refer to PIN VBAT J Pin ( ...
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... Internal pull-up resistor at 3.15 pin /RESET *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary] 18V and for –40°C T 150°C (200°C) unless stated otherwise. All values refer to PIN VBAT J Pin = V , 5.5V < ...
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... Receiver recessive state V EN 4.17 Receiver input hysteresis V HYS *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6833/ATA6834 [Preliminary] 18 18V and for –40°C T 150°C (200°C) unless stated otherwise. All values refer to PIN VBAT J Pin = 0V ...
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... Pull-up resistor TXD, WDD 5.7 Debounce time EN1 *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary] 18V and for –40°C T 150°C (200°C) unless stated otherwise. All values refer to PIN VBAT J Pin < ...
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... Sx of pins Hx ON-resistance of source V Sx 8.8 stage of pins Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6833/ATA6834 [Preliminary] 20 18V and for –40°C T 150°C (200°C) unless stated otherwise. All values refer to PIN VBAT J Pin > CPOUT ...
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... VBAT 8.24 Rise time high-side driver Type means 100% tested 100% correlation tested Characterized on samples Design parameter 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary] 18V and for –40°C T 150°C (200°C) unless stated otherwise. All values refer to PIN VBAT J Pin – ...
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... Low level output current V DG 10.2 High level output current Type means 100% tested 100% correlation tested Characterized on samples Design parameter Atmel ATA6833/ATA6834 [Preliminary] 22 18V and for –40°C T 150°C (200°C) unless stated otherwise. All values refer to PIN VBAT J Pin = 0.4V = VCC – ...
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... Application This section describes the principal application for which the ATA6833/ATA6834 was designed. Figure 9-1. Typical Application Battery C VCC VMODE 3.3/5V VCC Regulator VCC Supervisor: DG1 Short Circuit Overtemperature DG2 Undervoltage DG3 /RESET WD IH1-3 IL1-3 EN1 RX LIN TX ADC Hall C Hall B Hall A LIN 9122G– ...
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... Table 9-1. Component ESL (C ESR (C CCPOUT Atmel ATA6833/ATA6834 [Preliminary] 24 Typical External Components Function CVINT Blocking capacitor at VINT C Blocking capacitor at VCC VCC Serial inductance to C VCC ) VCC PCB Serial resistance to C VCC ) VCC PCB CVG Blocking capacitor at VG CCP1 Charge pump shuffle capacitor ...
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... ATA6833-PLQW ATA6834-PLQW 11. Package Information Package: VQFN_7 x 7_48L Exposed pad 4.5 x 4.5 Dimensions in mm Not indicated tolerances ±0.05 1 Pin 1 identification 12 Drawing-No.: 6.543-5137.01-4 Issue: 1; 19.10.06 9122G–AUTO–10/10 Atmel ATA6833/ATA6834 [Preliminary] Package QFN48 QFN48 Top 48 7 0.2 0.9 ±0.1 Z 10:1 0.23 ±0.07 Remarks Bottom 4 ...
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... Revision No. 9122G-AUTO-10/10 9122E-AUTO-02/10 9122D-AUTO-09/09 9122C-AUTO-04/09 9122B-AUTO-10/08 Atmel ATA6833/ATA6834 [Preliminary] 26 History Section 8 “Electrical Characteristics” numbers 8.23 and 8.24 on page 21 changed Page 12: Note added Page 21: El. Char. Table: rows 8.11 and 8.12 changed Section 4 “Absolute Maximum Ratings” on page 14 changed Section 8 “ ...
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