AD8190-9880/PCB Analog Devices Inc, AD8190-9880/PCB Datasheet

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... Outputs can be set to a high impedance state to reduce the power dissipation and/or allow the construction of larger arrays using the wire-OR technique. The AD8190 is provided in a space saving, 56-lead, LFCSP, surface-mount, Pb-free, plastic package and is specified to operate over the −40°C to +85°C temperature range. ...

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... High S peed Device Modes Register ......................................... 16 Auxiliary Device Modes Register............................................. 16 Receiver Settings Register ......................................................... 17 Input Termination Pulse Register ............................................ 17 Receive Equalizer Register ........................................................ 17 Transmitter Settings Register.................................................... 17 Application Notes ........................................................................... 18 Pinout........................................................................................... 18 Cable Lengths and Equalization............................................... 19 The AD8190 as a Single-Channel Buffer ................................ 19 PCB Layout Guidelines.............................................................. 19 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 23 Rev Page ...

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... Outputs enabled, maximum pre-emphasis 4 Input termination on Output termination on, no pre-emphasis Output termination on, maximum pre-emphasis Outputs disabled Outputs enabled, no pre-emphasis Outputs enabled, maximum pre-emphasis High speed switching register: HS_CH All other configuration registers Rev Page AD8190 Min Typ Max Unit 1.65 Gbps − (p-p) 1 ...

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... Differential interpair skew is measured between the TMDS pairs of a single link. 2 AD8190 output meets the transmitter eye diagram as defined in the DVI Standard Revision 1.0 and the HDMI Standard Revision 1.2a. 3 Cable output meets the receiver eye diagram mask as defined in the DVI Standard Revision 1.0 and the HDMI Standard Revision 1.2a. ...

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... IN The maximum power that can be safely dissipated by the < DVCC + 0 AD8190 is limited by the associated rise in junction tempera- ture. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175° ...

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... AD8190 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NOTES 1. THE AD8190 LFCSP HAS AN EXPOSED PADDLE (ePAD) ON THE UNDERSIDE OF THE PACKAGE WHICH AIDS IN HEAT DISSIPATION. THE ePAD MUST BE ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER TO MEET THERMAL SPECIFICATIONS. Table 4. Pin Function Descriptions Pin No. ...

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... Low Speed Common Input/Output. LS I/O Low Speed Common Input/Output. LS I/O Low Speed Common Input/Output. Power Negative Digital and Auxiliary Switch Power Supply nominal. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. LS I/O Low Speed Input/Output. Rev Page AD8190 ...

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... Figure 4. Test Circuit Diagram for RX Eye Diagrams Figure 7. RX Eye Diagram at TP3 (Cable = AWG) Figure 8. RX Eye Diagram at TP3 (Cable = AWG) Rev Page − 1, data rate = 1.65 Gbps, unless otherwise noted. AD8190 SERIAL DATA EVALUATION ANALYZER BOARD SMA COAX CABLE TP2 TP3 0 ...

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... Figure 9. Test Circuit Diagram for TX Eye Diagram Figure 12. TX Eye Diagram at TP3 (Cable = AWG) Figure 13. TX Eye Diagram at TP3 (Cable = AWG) Rev Page − 1, data rate = 1.65 Gbps, unless otherwise noted. HDMI CABLE SERIAL DATA ANALYZER TP3 0.125UI/DIV AT 1.65Gbps 0.125UI/DIV AT 1.65Gbps AD8190 ...

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... AD8190 T = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, DVCC = 3.3 V, AMUXVCC = 5 V, AVEE = 0 V, DVEE = 0 V, differential input swing = A 1000 mV, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, pattern = PRBS 2 0.6 2m CABLE = 30AWG 5m TO 10m CABLES = 28AWG 15m TO 30m CABLES = 24AWG ...

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... Figure 24. Differential Input Termination Resistance vs. Temperature 60 80 100 Rev Page − 1, data rate = 1.65 Gbps, unless otherwise noted (p- (rms) 0 2.5 2.7 2.9 3.1 3.3 3.5 INPUT COMMON-MODE VOLTAGE (V) Figure 23. Jitter vs. Input Common-Mode Voltage 120 115 110 105 100 –40 – TEMPERATURE (°C) AD8190 3.7 80 100 ...

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... AD8190 can be set without degrading the signal integrity, even for short input cables. At the 12 dB setting, the AD8190 can equalize meters of 24 AWG cable at 1080p, over reference cables that exhibit an insertion loss of −15 dB. ...

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... DDC bus, regardless of the state of the AD8190 and any downstream circuit. For this configuration, the auxiliary inputs of the powered down AD8190 need high impedance state to avoid pulling down on the DDC lines and preventing these other devices from using the bus. ...

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... AD8190 SERIAL CONTROL INTERFACE RESET On initial power-up any point in operation, the AD8190 register set can be restored to the default values by pulling the RESET pin to low according to the specification in Table 1. During normal operation, however, the RESET pin must be pulled up to 3.3 V. Pulling the RESET pin to low sets the ...

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... SWITCHING/UPDATE DELAY There is a delay between when a user writes to the configura- tion registers of the AD8190 and when that state change takes physical effect. This update delay begins at the falling edge of I2C_SCL for the last data bit transferred, as shown in Figure 29. This update delay is register specific and the times are specified in Table 1 ...

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... AD8190 CONFIGURATION REGISTERS The serial interface configuration registers can be read and written using the I 2 The LSB of the AD8190 I C part address is set by tying Pin I2C_ADDR to 3.3 V (I2C_ADDR = (I2C_ADDR = 0). Table 5. Register Map Name Bit 7 Bit 6 High Speed High speed Device switch enable ...

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... X_PTO: High Speed (TMDS) Output Termination On/Off Select Bit (All Channels) Table 16. TX_PTO Description TX_PTO Description 0 Output termination off 1 Output termination on TX_OCL: High Speed (TMDS) Output Current Level Select Bit (All Channels) Table 17. TX_OCL Description TX_OCL Description 0 Output current set Output current set Rev Page AD8190 ...

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... AD8190 fully buffers and electrically decouples the outputs from the inputs. Therefore, the effects of the vias placed on the output signal lines are not seen at the input of the AD8190. The programmable output terminations also improve signal quality at the output of the AD8190. The PCB designer, there- ...

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... PCB layout. Regardless of the data being carried on a specific TMDS channel, or whether the TMDS line is at the input or the output of the AD8190, all four high speed signals should be routed on a PCB in accordance with the same RF layout guidelines. ...

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... SDA and SCL (serial data and serial clock, respectively). These four signals can be switched through the auxiliary bus of the AD8190 and do not need to be routed with the same strict considerations as the high speed TMDS signals. In general sufficient to route each auxiliary signal as a single-ended trace ...

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... This 50 pF limit includes the HDMI connector, the PCB, and whatever capacitance is seen at the input of the AD8190 equivalent receiver. There is a similar limit of 100 pF of input capacitance for the CEC line. The parasitic capacitance of traces on a PCB increases with trace length. To help ensure that a design satisfies the HDMI specification, the length of the CEC and DDC lines on the PCB should be made as short as possible ...

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... RECOMMENDED NOT RECOMMENDED Figure 34. Recommended Pad Outline for Bypass Capacitors In applications where the AD8190 is powered by a single 3.3 V supply recommended to use two reference supply planes and bypass the 3.3 V reference plane to the ground reference plane with one 220 pF, one 1000 pF, two 0.01 μF, and one 4.7 μF capacitors ...

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... SEATING PLANE NOTE: THE AD8190 HAS A CONDUCTIVE HEAT SLUG TO HELP DISSIPATE HEAT AND ENSURE RELIABLE OPERATION OF THE DEVICE OVER THE FULL DVI/HDMI TEMPERATURE RANGE. THE SLUG IS EXPOSED ON THE BOTTOM OF THE PACKAGE AND ELECTRICALLY CONNECTED TO AVEE RECOMMENDED THAT NO PCB SIGNAL TRACES OR VIAS BE LOCATED UNDER THE PACKAGE THAT COULD COME IN CONTACT WITH THE CONDUCTIVE SLUG ...

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... AD8190 NOTES Purchase of licensed 2 components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips Patent Rights to use these components in an ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...