SI3056PPT2-EVB Silicon Laboratories Inc, SI3056PPT2-EVB Datasheet - Page 3

• Manufacturer Part Number: SI3056PPT2-EVB
• Description: BOARD EVAL FOR DAA SI3056/SI3010
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3056PPT2-EVB

• Main Purpose: Telecom, Data Acquisition Arrangement (DAA)
• Utilized Ic / Part: Si3056
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Configuring the Si30xxPPT-EVB
The S30xxPPT-EVB is used to interface the Si30xx
chipset to a PC or other audio system for easy
evaluation. It uses an FPGA to translate the parallel port
interface to the SSI bus to communicate to the Si30xx.
The audio data and control data are communicated from
the controlling PC using the aforementioned software.
This mode allows the user to evaluate the DAA without
any lab equipment other than a PC.
When in mode 0, the negative edge of FSYNC indicates
the starting of the frame, and FSYNC is low until the end
of data transfer. By selecting mode 1 operation, the
rising edge of FSYNC indicates the start of the frame,
but is only high for one cycle. To evaluate the Si30xx’s
multiple device operation, chain the slave boards with
JP3 and JP4 set to mode 2. See Table 1 for a
description of these operating modes.
Mode M1 M2
0
1
2
3
0
0
1
1
Table 1. Mode Configuration
0
1
0
1
FSYNC pulse starts data frame
FSYNC frames data
Description
Slave mode
Reserved
Preliminary Rev. 1.0
The Si30xxPPT-EVB has the ability to interface in two
different modes of the SSI bus: 5-bit address space
operation is used for the Si3034/35/44, and 7-bit
address space operation is used for the Si3056. Table 2
shows how to configure the Si30xxPPT-EVB to operate
in a desired SSI operational mode.
Table 2. SSI Operational Mode Configuration
5-bit Addr
7-bit Addr
Mode
Sel0
0
1
Si30xxPPT-EVB
For Si3021 digital side
For Si3056 digital side
Description
3