SI5319-EVB Silicon Laboratories Inc, SI5319-EVB Datasheet - Page 4

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SI5319-EVB

Manufacturer Part Number
SI5319-EVB
Description
BOARD EVALUATION SI5319
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5319-EVB

Main Purpose
Timing, Clock Multiplier
Embedded
No
Utilized Ic / Part
SI5319
Primary Attributes
1 Input, 1 Output
Secondary Attributes
CML, CMOS, LVDS, LVPECL
Processor To Be Evaluated
Si5319
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Si531x-EVB
Si532x-EVB
5.2. Block Diagram
Figure 2 is a block diagram of the evaluation board and it is helpful to refer to this diagram. The MCU
communicates to the host PC over a USB connection. The MCU controls and monitors the Si532x through the
CPLD. The CPLD, among other tasks, translates the signals at the MCU voltage level of 3.3 V to the Si532x's
voltage level, which is nominally 3.3, 2.5, or 1.8 V. The user has access to all of the Si532x's pins using the various
jumper settings as well as through the host PC via the MCU and CPLD.
Figure 2. Si532x QFN Block Diagram
5.3. Si532x Input and Output Clocks
The Si532x has two differential inputs that are ac terminated to 50  and then ac coupled to the part. Single-ended
operation can be implemented by simply not connecting to one of the two of the differential pairs bypassing the
unused input to ground with a capacitor. When operating with clock inputs of 1 MHz or less in frequency, the
appropriate dc blocking capacitors (C39, C41, C34 and C36) located on the bottom of the board should be
replaced with zero ohm resistors. The reason for this is that the capacitive reactance of the ac coupling capacitors
becomes significant at low frequencies. It is also important that the CKIN signal meet the minumum rise time of
11 ns (CKNtrf) even though the input frequency is low.
The two clock outputs (one for the Si5316-EVB and Si5319-EVB) are all differential, AC coupled and configured for
driving 50 ohm transmission lines. When using single ended outputs, it is important that the unused half of
the output be terminated.
Two jumpers are provided to assist in monitoring the Si532x power: When R27 is removed, J20 can be used to
measure the device current. J12 can be used at any time to monitor the supply voltage at the device.
The Si5319, Si5323 and Si5326 require that an external reference clock be provided to enable the devices to
operate as narrowband jitter attenuators with loop bandwidths as low as 60 Hz (4 Hz for the Si5324). The external
reference clock can be either a crystal, a standalone oscillator or some other clock source. The range of acceptable
reference frequencies is described in the Any-Rate Precision Clocks Family Reference Manual (Si53xxRM.pdf).
The EVBs are shipped with a 3rd overtone 114.285 MHz crystal that is used in the majority of applications. J1 and
J2 are used when the Si532x is to be configured in narrowband mode with an external reference oscillator (i.e.
without using the 114.285 MHz crystal).
The RATE pins should also be configured for the desired mode, using the jumper plugs at J9 (see Table 6).
For unused inputs and outputs, please refer to the Any-Rate Precision Clocks Family Reference Manual
(Si53xxRM.pdf).
Table 2 shows how the various components should be configured for the three modes of operation.
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Rev. 0.4

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