MAX9776EVKIT+ Maxim Integrated Products, MAX9776EVKIT+ Datasheet - Page 26

• Manufacturer Part Number: MAX9776EVKIT+
• Description: EVALUATION KIT FOR MAX9776
• Manufacturer: Maxim Integrated Products
• Series: DirectDrive™r

Specifications of MAX9776EVKIT+

• Amplifier Type: Class D
• Output Type: 1-Channel (Mono) with Stereo Headphones
• Max Output Power X Channels @ Load: 1.5W x 1 @ 4 Ohm; 60mW x 2 @ 16 Ohm
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Board Type: Fully Populated
• Utilized Ic / Part: MAX9776
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I
A master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure
9). A START (S) condition from the master signals the
beginning of a transmission to the MAX9775/MAX9776.
The master terminates transmission, and frees the bus,
by issuing a STOP (P) condition. The bus remains active
if a REPEATED START (Sr) condition is generated
instead of a STOP condition.
The MAX9775/MAX9776 recognize a STOP condition at
any point during data transmission except if the STOP
condition occurs in the same high pulse as a START
condition.
The MAX9775/MAX9776 are available with one preset
slave address (see Table 1). The address is defined as
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Figure 9. START, STOP, and REPEATED START Conditions
26
2
C bus is not busy.
SDA
SCL
______________________________________________________________________________________
S
START and STOP Conditions
Sr
Early STOP Conditions
Slave Address
Bit Transfer
P
the seven most significant bits (MSBs) followed by the
Read/Write bit. The address is the first byte of informa-
tion sent to the MAX9775/MAX9776 after the START
condition. The MAX9775/MAX9776 are slave devices
only capable of being written to. The Read/Write bit
should be a zero when configuring the MAX9775/
MAX9776.
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9775/MAX9776 use to handshake receipt of each
byte of data (see Figure 10). The MAX9775/MAX9776
pull down SDA during the master-generated 9th clock
pulse. Monitoring ACK allows for detection of unsuc-
cessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master may reattempt communications.
Table 1. MAX9775/MAX9776 Address Map
Figure 10. Acknowledge
MAX9775
MAX9776
SDA
SCL
PART
CONDITION
START
A6
1
1
1
A5
0
0
2
A4
0
0
SLAVE ADDRESS
A3
1
1
NOT ACKNOWLEDGE
ACKNOWLEDGE
A2
1
1
8
ACKNOWLEDGMENT
CLOCK PULSE FOR
Acknowledge
A1
0
0
9
A0
0
1
R/W
0
0