IRDC3822A International Rectifier, IRDC3822A Datasheet - Page 15

• Manufacturer Part Number: IRDC3822A
• Description: BOARD EVAL SYNC BUCK CONVERTER
• Manufacturer: International Rectifier

11/04/08
Based on the frequency of the zero generated by
output capacitor and its ESR versus crossover
frequency, the compensation type can be
different.
compensation types and location of crossover
frequency.
Table1- The compensation type and location
The details of these compensation types are
discussed in application note AN-1043 which can
be downloaded from IR’s website at www.irf.com.
For this design we have:
V
V
V
V
g
L
C
F
The value of the capacitance used in the
compensator design must be the small signal
value. For instance, the small signal capacitance
of the 22uF capacitor used in this design is 12uF
at 1.8 VDC bias and 600 kHz frequency. It is this
value that must be used for all computations
related to the compensation. The small signal
value may be obtained from the manufacturer’s
datasheets, design tools or SPICE models.
Alternatively, they may also be inferred from
measuring the power stage transfer function of
the converter and measuring the double pole
frequency FLC and using equation (11) to
compute the small signal Co.
These result to:
F
F
F
Compensator
type
m
o
in
o
osc
ref
s
LC
ESR
s/2
o
Type III(PID)
Type III(PID)
=2.2uH
=300kHz
=1.8V
=1000umoh
=6x22uF, ESR=0.5mOhm
=12V
Type II(PI)
Method A
Method B
=0.6V
=12.65kHz
=150kHz
=1.25V
=4.4MHz
The
of F
ESR
F
F
F
LC
LC
LC
table
F
versus F
<F
<F
<F
ESR
ESR
o
o
<F
<F
vs. F
<F
ESR
s/2
below
o
<F
o
<F
<F
o
ESR
s/2
s/2
shows
Output
capacitor
Electrolytic
, Tantalum
Tantalum,
Ceramic
ceramic
the
F
F
F
F
Select
Select
R
Select
Calculate
C
C
Calculate
R
Select
R
R
Select crossover frequency:
Fo=60kHz
Since: FLC<Fo<Fs/2<FESR , type III method B is
selected to place the poles and zeros.
The following design rules will give a crossover
frequency approximately one-tenth of the
switching frequency. The higher the band width,
the potentially faster the load transient response.
The DC gain will be large enough to provide high
DC-regulation accuracy (typically -5dB to -12dB).
The phase margin should be greater than 45
overall stability.
Desired Phase Boost:
P
P
Z
Z
F
3
4
3
10
8
9
2
2
2
2
o
=
=
=
=
=
=
=
=
=
=
<
V
2
2
10
2
2
F
F
340
2
F
π
π
o
π
π
o
o
V
:
:
:
π
:
ESR
-
.
*
*
C
R
R
*
ref
*
*
*
58
F
V
*
.
7
10
3
C
F
F
F
28
Z1
1
ref
C
C
1
1
R
and
1
1
o
Z1
P
kHz
1
1
1
=
=
7
3
7
=
4
10
=
*
C
*
+
*
+
kHz
180pF
-
-
*
34.8K
*
*
and
L
. 2
7
,
R
Sin
Sin
0
F
Sin
Sin
R
R
R
F
o
*
Z
5 .
8
F
61
P
*
2
V
3
3
8
;
o
2
Θ
Θ
Θ
Θ
*
C
in
;
and
R
C
;
-
K
≤
;
C
C
F
Ω
R
o
9
3
R
Ω
Z
(
4
*
3
10
1/5
:
10
=
2
V
=
=
R
;
IR3822AMPbF
40
OSC
=
R
0.86nF,
and
30
9
~
8
. 2
.
:
30
8 .
1/10
Θ
,
=
60
R
80
max
pF
K
F
3
K
Ω
=
P3
.
Ω
)
,
97
34
,
=
*
Select
Select
,
=
Select
70
F
.
K
check
56
0.5
s
Ω
o
,
KΩ
Select
*
:
:
F
:
R
PD-60345
,
R
s
C
C
check
9
10
4
3
=
=
=
≥
:
40
1
R
22
g
0 .
1
8
m
2 .
R
pF
nF
=
K
3
80
Ω
o
≥
for
6 .
g
15
2
m
K
Ω