LP3971SQ-B410EV National Semiconductor, LP3971SQ-B410EV Datasheet - Page 48

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LP3971SQ-B410EV

Manufacturer Part Number
LP3971SQ-B410EV
Description
BOARD EVALUATION LP3971SQ-B410
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheets

Specifications of LP3971SQ-B410EV

Main Purpose
DC/DC, Step Down with LDO
Outputs And Type
9, Non-Isolated
Voltage - Input
2.7 ~ 5.5V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
LP3971
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output
-
Voltage - Output
-
Power - Output
-
Frequency - Switching
-
Lead Free Status / Rohs Status
Not Compliant
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Board Layout Considerations
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce, and resistive voltage loss in the traces. These
can send erroneous signals to the DC-DC converter IC, re-
sulting in poor regulation or instability.
Good layout for the converters can be implemented by fol-
lowing a few simple design rules.
1.
2.
3.
Place the converters, inductor and filter capacitors close
together and make the traces short. The traces between
these components carry relatively high switching
currents and act as antennas. Following this rule reduces
radiated noise. Special care must be given to place the
input filter capacitor very close to the V
Arrange the components so that the switching current
loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor
through the converter and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground through the converter by the inductor to
the output filter capacitor and then back through ground
forming a second current loop. Routing these loops so
the current curls in the same direction prevents magnetic
field reversal between the two half-cycles and reduces
radiated noise.
Connect the ground pins of the converter and filter
capacitors together using generous component-side
IN
and GND pin.
48
4.
5.
6.
copper fill as a pseudo-ground plane. Then, connect this
to the ground-plane (if one is used) with several vias. This
reduces ground-plane noise by preventing the switching
currents from circulating through the ground plane. It also
reduces ground bounce at the converter by giving it a
low-impedance ground connection.
Use wide traces between the power components and for
power connections to the DC-DC converter circuit. This
reduces voltage errors caused by resistive losses across
the traces.
Route noise sensitive traces, such as the voltage
feedback path, away from noisy traces between the
power components. The voltage feedback trace must
remain close to the converter circuit and should be direct
but should be routed opposite to noisy components. This
reduces EMI radiated onto the DC-DC converter’s own
voltage feedback trace. A good approach is to route the
feedback trace on another layer and to have a ground
plane between the top layer and layer on which the
feedback trace is routed. In the same manner for the
adjustable part it is desired to have the feedback dividers
on the bottom layer.
Place noise sensitive circuitry, such as radio RF blocks,
away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noise-
sensitive circuitry in the system can be reduced through
distance.

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