MCP4725EV Microchip Technology, MCP4725EV Datasheet - Page 20

• Manufacturer Part Number: MCP4725EV
• Description: BOARD EVAL FOR MCP4725
• Manufacturer: Microchip Technology

Specifications of MCP4725EV

• Number Of Dac's: 1
• Number Of Bits: 12
• Outputs And Type: 1, Single Ended
• Sampling Rate (per Second): 100k ~ 3.4M
• Data Interface: I²C
• Settling Time: 6µs
• Dac Type: Voltage
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 125°C
• Utilized Ic / Part: MCP4725
• Processor To Be Evaluated: MCP4725
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP4725
5.4.2
The MCP4725 uploads the EEPROM data to the DAC
register during power-up sequence. However, if the
V
not be able to load the EEPROM data to the DAC
register. Therefore, the DAC output that is correspond-
ing to the current EEPROM data may not available to
the output pin. It is highly recommended to send a Gen-
eral Call Reset Command (see Section 7.3.1 “Gen-
eral call reset”) after power-up. This command will
reset the device at a stable V
put available immediately using the EEPROM data.
5.5
The device has two modes of operation: Normal mode
and power-down mode. The mode is selected by
programming the power-down bits (PD1 and PD0) in
the Configuration register. The user can also program
the two power-down bits in non-volatile EEPROM
memory.
When the normal mode is selected, the device
operates a normal digital-to-analog conversion. If the
power-down mode is selected, the device enters a
power saving condition by shutting down most of the
internal circuits. During the power-down mode, all
internal circuits except the I
and there is no data conversion event, and no V
available. The device also switches the output stage
from the output of the amplifier to a known resistive
load. The value of the resistive load is determined by
the state of the power-down bits (PD1 and PD0).
Table 5-2
and the resistive load.
During the power-down mode, the device draws about
60 nA (typical). Although most of internal circuits are
shutdown, the serial interface remains active in order
to receive the I
The device exits the power-down mode immediately
when (a) it receives a new write command for normal
mode or (b) it receives an I
Command.
When the DAC operation mode is changed from
power-down to normal mode, the output settling time
takes less than 10 µs, but greater than the standard
Active mode settling time (6 µs, typical).
DS22039D-page 20
DD
ramp rate is too slow ( <1 V/ms), the device may
Normal and Power-Down Modes
shows the outcome of the power-down bit
V
DD
2
C command.
RAMP RATE AND EEPROM
2
DD
2
C General Call Wake-Up
C interface are disabled
and make the DAC out-
OUT
is
TABLE 5-2:
FIGURE 5-1:
Down Mode.
Note 1:
PD1
0
0
1
1
OP
Amp
Control Circuit
Power-Down
In the power-down mode: V
most of internal circuits are disabled.
Resistive String DAC
PD0
0
1
0
1
POWER-DOWN BITS
Resistive
Normal Mode
1 kΩ resistor to ground
100 kΩ resistor to ground
500 kΩ resistor to ground
Output Stage for Power-
Load
© 2009 Microchip Technology Inc.
1 kΩ
Function
OUT
100 kΩ 500 kΩ
is off and
(1)
V
OUT
(1)
(1)