P0304 Terasic Technologies Inc, P0304 Datasheet - Page 71

• Manufacturer Part Number: P0304
• Description: DE2-70 CALL FOR ACADEMIC PRICING
• Manufacturer: Terasic Technologies Inc
• Type: FPGAr

Specifications of P0304

• Contents: DE2-70 Board, Power Supply, Cables, Plastic cover and software
• For Use With/related Products: Cyclone II 2C70
• For Use With: P0033 - BOARD ADAPTER HSMC TO GPIOP0006 - BOARD ADAPTER THDB-SUMP0001 - MODULE DIGITAL CAMERA 5MP (D5M)P0307 - KIT DEV 4.3" LCD TOUCH PANEL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DE2-70

monitor.
Demonstration Setup, File Locations, and Instructions
Figure 6.2 illustrates the setup for this demonstration.
Decoder
7180
 Project directory: DE2_70_TV
 Bit stream used: DE2_70_TV.sof or DE2_70_TV.pof
 Connect a DVD player’s composite video output (yellow plug) to the Video-IN 1 RCA jack
 Connect the VGA output of the DE2-70 board to a VGA monitor (both LCD and CRT type
 Connect the audio output of the DVD player to the line-in port of the DE2-70 board and
 Load the bit stream into FPGA. Press KEY0 on the DE2-70 board to reset the circuit
TV
(J8) of the DE2-70 board. The DVD player has to be configured to provide
of monitors should work)
connect a speaker to the line-out port. If the audio output jacks from the DVD player are of
RCA type, then an adaptor will be needed to convert to the mini-stereo plug supported on
the DE2-70 board; this is the same type of plug supported on most computers
o NTSC output
o 60 Hz refresh rate
o 4:3 aspect ratio
o Non-progressive video
I2C_SCLK
I2C_SDAT
TD_HS
TD_VS
TD_DATA
Figure 6.1. Block diagram of the TV box demonstration.
ITU-R 656
Initiation
Detector
I2C_AV
Locked
Decoder
Timer
Config
Delay
To Control the
Data Valid
YUV 4:2:2
DLY0
DLY1
DLY2
Initiation
Sequence
YUV 4:2:2
YUV 4:4:4
SDRAM
68
Frame
Buffer
MUX
To
YUV 4:2:2
Even
VGA_Y
Odd
Controller
YCbCr
RGB
VGA
To
Request
VGA_HS
VGA_VS
RGB
DE2-70 User Manual
VGA
DAC
7123