C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet
C8051F310-TB
Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F310-TB
Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Analog Peripherals
10-Bit ADC
-
-
-
-
-
Two Comparators
-
-
-
POR/Brown-out Detector
On-Chip Debug
-
-
-
-
Supply Voltage: 2.7 to 3.6 V
-
-
Small Form Factor
±1 LSB INL; no missing codes
Programmable throughput up to 200 ksps
Up to 21 external inputs; programmable as single-ended or differential
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
Programmable hysteresis and response time
Configurable to generate interrupts or reset
Low current (0.4 µA)
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping
Inspect/modify memory and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Typical Operating Current: 7 mA at 25 MHz
Typical Stop Mode Current: <0.1 µA
RST/C2CK
VDD
GND
XTAL1
XTAL2
Analog/Digital
Power
C2D
Oscillator
Oscillator
External
Internal
15 µA at 32 kHz
Circuit
2%
POR
25 MIPS, 16 kB Flash, 10-Bit ADC, 32-Pin Mixed-Signal MCU
Brown-
Debug
Out
HW
System Clock
Copyright © 2004 by Silicon Laboratories
Reset
C
8
0
5
1
o
e
r
SFR Bus
256 By te
FLASH
SRAM
XR AM
16 kB
1 kB
High-Speed 8051 µC Core
-
-
-
Memory
-
-
Digital Peripherals
-
-
-
-
-
Clock Sources
-
-
-
32-Pin LQFP
Temperature Range: –40 to +85 °C
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 25 MIPS throughput with 25 MHz system clock
Expanded interrupt handler
1280 bytes data RAM
16 kB Flash; in-system programmable in 512-byte sectors (512 bytes
are reserved)
29 port I/O; all are 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports
available concurrently
Programmable 16-bit counter/timer array with five capture/compare
modules, WDT
4 general-purpose 16-bit counter/timers
Realtime clock mode using timer or PCA
Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
Can switch between clock sources on-the-fly
VDD
10-bit
200 ksps
0,1,2,3 /
ADC
SMBus
Port 0
Port 1
UART
Port 2
Port 3
Latch
Latch
Timer
Latch
Latch
PCA/
WDT
RTC
SPI
VREF
CP0
CP1
VREF
VDD/
Temp
M
U
A
X
+
+
-
-
O
C
R
S
S
B
A
R
C8051F310
AIN0-AIN20
P
D
P
D
P
D
P
D
0
v
1
v
2
v
3
v
r
r
r
r
P0.0/VREF
P0.1
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVST
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0/C2D
P3.1
P3.2
P3.3
P3.4
6.15.2004
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C8051F310-TB Summary of contents
Page 1
... Can switch between clock sources on-the-fly 32-Pin LQFP Temperature Range: –40 to +85 ° FLASH 0 5 Reset 256 By te SRAM SFR Bus System Clock r e Copyright © 2004 by Silicon Laboratories C8051F310 P0.0/VREF P Port 0 P0.1 0 P0.2/XTAL1 Latch P0.3/XTAL2 P0.4/TX Port 1 D P0.5/RX Latch r P0.6/CNVST v P0.7 UART C P1.0 ...
Page 2
... Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders CONDITIONS MIN 2.7 Monitor Disabled DD Monitor Enabled DD Monitor Disabled DD DC 24.0 53 C8051F310DK Development Kit MIN NOM MAX (mm) (mm) (mm 1.60 A1 0.05 - ...