MAXQ7670EVKIT+ Maxim Integrated Products, MAXQ7670EVKIT+ Datasheet - Page 8

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MAXQ7670EVKIT+

Manufacturer Part Number
MAXQ7670EVKIT+
Description
KIT EVAL FOR MAXQ7670
Manufacturer
Maxim Integrated Products
Series
MAXQ®r
Type
MCUr
Datasheet

Specifications of MAXQ7670EVKIT+

Contents
Board
For Use With/related Products
MAXQ7670
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Microcontroller with 10-Bit ADC,
PGA, 64KB Flash, and CAN Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
noted. Typical values are at T
Note 1: All devices are 100% production tested at T
Note 2: All analog functions disabled and all digital inputs connected to supply or ground.
Note 3: High-speed/8 mode without CAN; V
Note 4: High-speed/1 mode with CAN; V
Note 5: Low speed, PMM1 mode without CAN; V
Note 6: CAN transmitting at 500kbps; 16-bit timer output switching at 500kHz; all active I/Os are loaded with a 20pF capacitor; all
Note 7: Guaranteed by design and characterization.
Note 8: This is not a static capacitance. It is the capacitance presented to the analog input when the T/H amplifier is in sample mode.
Note 9: The switched capacitor on the REFADC input can disturb the reference voltage. To reduce this disturbance, place a 0.1µF
Note 10: The digital design is fully static. However, the lower clock limit is set by a clock detect circuit. The MAXQ7670 switches to
8
SS Falling Edge to First SCLK
Sample Edge
SCLK Inactive to SS Rising
Edge
Minimum CS Pulse Width
DVDDIO
_______________________________________________________________________________________
PARAMETER
= +5.0V, V
design.
oscillator; all other peripherals disabled; all digital I/Os static at V
oscillator; CAN enabled and communicating at 500kbps; all other peripherals disabled, all digital I/Os (except CANTXD
and CANRXD) static at V
tor in PMM1 mode; all other peripherals disabled; all digital I/Os static at V
remaining digital I/Os are static at V
capacitor from REFADC to AGND as close as possible to REFADC.
the internal RC clock if the external input goes below 166kHz. This clock detect circuit also acts to detect a crystal failure
when a crystal is used.
AVDD
= +3.3V, V
A
= +25°C.) (Note 1)
DVDDIO
SYMBOL
t
DVDD
t
SCW
SSE
t
SD
or GNDIO, T
DVDD
= +2.5V, V
DVDDIO
DVDD
= +2.5V, CPU and 16-bit timer running at 16MHz from an external, 16MHz crystal
DVDD
= +2.5V, CPU and 16-bit timer running at 2MHz from an external, 16MHz crystal
or GNDIO, T
REFADC
A
A
= +2.5V, CPU and one timer running from an external, 16MHz crystal oscilla-
= +25°C and +125°C. Temperature limits to T
= T
CONDITIONS
MIN
= +3.3V, system clock = 16MHz. T
to T
A
= T
MAX
MIN
.
DVDDIO
to T
MAX
or GNDIO; T
.
DVDDIO
2 t
t
t
SYSCLK
SYSCLK
SYSCLK
+ 10
+ 10
MIN
+ 5
or GNDIO, T
A
= T
A
= T
MIN
TYP
MIN
A
to T
A
= -40°C are guaranteed by
= T
to T
MAX
MIN
MAX
.
to T
MAX
, unless otherwise
MAX
.
UNITS
ns
ns
ns

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