45181 Parallax Inc, 45181 Datasheet
45181
Specifications of 45181
Related parts for 45181
45181 Summary of contents
Page 1
...
Page 2
Parallax warrants its products against defects in materials and workmanship for a period of 90 days from receipt of product. If you discover a defect, Parallax will, at its option, repair or replace the merchandise, or refund the purchase price. ...
Page 3
WEB SITE AND DISCUSSION LISTS The Parallax web site (www.parallax.com) has many downloads, products, customer applications and on-line ordering for the components used in this text. We also maintain several e-mail discussion lists for people interested in using Parallax products. ...
Page 4
Welcome Thank you for purchasing the Parallax SX-Key /Blitz development system. We have done our best to produce a full-featured, yet easy to use development system for the SX microcontrollers. The result is the SX-Key and the SX-Blitz; very tiny, ...
Page 5
Table of Contents 1 Introduction to the SX-Key/Blitz Hardware ................................................................................................................13 2 Installing the SX-Key/Blitz Software.............................................................................................................................15 3 Quick Start Introduction..................................................................................................................................................17 3.1 Connecting and Downloading to the SX Tech Board .......................................................................................17 4 The SX-Key/Blitz Interface .............................................................................................................................................19 4.1 Starting the SX-Key/Blitz Software ....................................................................................................................19 ...
Page 6
Table of Contents 7.3.11 The ID Directive.....................................................................................................................................53 7.3.12 The IF…ELSE…ENDIF Directive ........................................................................................................53 7.3.13 The IF{N}DEF…ELSE…ENDIF Directives .........................................................................................54 7.3.14 The INCLUDE Directive.......................................................................................................................55 7.3.15 The IRC_CAL Directive ........................................................................................................................56 7.3.16 The LIST Directive .................................................................................................................................56 7.3.17 The LPAGE Directive............................................................................................................................57 7.3.18 The ORG (Origin) Directive ...
Page 7
Data Types..............................................................................................................................................................83 8.8 Reserved Words and Symbols .............................................................................................................................84 9 Upgrading Existing Code for SASM .............................................................................................................................. Special Features and Coding Tips ............................................................................................................................87 10.1 Introduction ...........................................................................................................................................................87 10.2 Port Configuration and Usage .............................................................................................................................87 10.2.1 Port Direction .........................................................................................................................................88 10.2.2 Pull-Up Resistors ...
Page 8
Table of Contents 15.2.2 Read-Modify-Write Considerations ..................................................................................................151 15.2.3 Register Map Structure .......................................................................................................................151 15.2.4 Special Function Registers..................................................................................................................153 15.2.5 IND – The Indirect Register ($00) ......................................................................................................153 15.2.6 Real Time Clock/Counter, WREG ($01)...........................................................................................153 15.2.7 PC – Program Counter ($02) ..............................................................................................................153 15.2.8 STATUS Register ...
Page 9
Option ...................................................................................................................................................174 15.4.4 Fuse Registers.......................................................................................................................................174 15.5 Interrupts ..............................................................................................................................................................175 15.5.1 Description ...........................................................................................................................................175 15.5.2 The Specifics .........................................................................................................................................175 15.5.3 RTCC Interrupt ....................................................................................................................................175 15.5.4 RB0-RB7 Interrupt ...............................................................................................................................176 15.6 Peripherals............................................................................................................................................................176 15.6.1 Oscillator Driver ..................................................................................................................................176 15.6.1.1 LP, XT and HS Mode...........................................................................................................176 15.6.1.2 External RC Mode................................................................................................................178 ...
Page 10
Table of Contents Figures Figure 1 - Connecting the SX-Key/Blitz ................................................................................................................................ 13 Figure 2 - First Time Running Window................................................................................................................................. 16 Figure 3 - Configure Window................................................................................................................................................. 16 Figure Tech Board with SX chip inserted................................................................................................................... 17 Figure 5 - ...
Page 11
Tables Table 1 - Editor Shortcut Keys ................................................................................................................................................ 21 Table 2 - Debugger Buttons and Shortcut Keys.................................................................................................................... 35 Table 3 – Register Editing Keys .............................................................................................................................................. 36 Table Clock Options...................................................................................................................................................... 40 Table 5 - SASM Directives ....................................................................................................................................................... 46 ...
Page 12
Table of Contents Page 12 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 13
Introduction to the SX-Key/Blitz Hardware The SX-Key/Blitz hardware consists of the programmer unit, a four-pin programming interface and a standard, female serial port connector (DB9). The serial port connector should be plugged into an available standard, straight-through serial cable ...
Page 14
Introduction the SX-Key/Blitz Hardware The SX-Blitz is designed lower-cost device for programming the SX chips only (no debugging features are available). The SX-Blitz and SX-Key use the same interface software for programming, however, debugging features will ...
Page 15
... After the setup has finished, you will find a shortcut on the desktop, and a new “Parallax Inc” program group in the Start menu. You may also download the software from the Parallax web site. There are two different file versions available ...
Page 16
Installing the SX-Key/Blitz Software This is to remind you that you should review some basic configuration settings first. Click the OK but- ton, and press Ctrl-U to open the Configuration dialog shown to the right. The only setting that ...
Page 17
Quick Start Introduction This chapter is a quick start guide to connecting the SX-Key/Blitz and programming the SX microcontroller. Without even knowing how the SX-Key/Blitz and the SX chip work, you should be able to obtain satisfactory results from ...
Page 18
Quick Start Instruction 2) Connect the SX-Key/Blitz to a serial cable, and the serial cable to the serial (COM) port on the PC that you have selected in the “Configure” dialog of the SX-Key/Blitz software. 3) Connect the SX-Key/Blitz ...
Page 19
... During installation, a shortcut was automatically placed on the Windows desktop. Double-click on the SX-Key icon to launch the SX-Key/Blitz interface. In case, the Icon has been deleted from the desktop, you can also start the software via the Windows Start button. Navigate to the Parallax Inc. program group and select “SX-Key v2.0” there. ...
Page 20
The SX-Key/Blitz Interface made in the Configure window recommended not to use these switches; they have been implemented for compatibility reasons only. 4.2 The SX Editor The SX editor (see Figure 6 – The SX Editor, above) ...
Page 21
Function Shortcut Name Keys Copy Ctrl-C Cut Ctrl-X Paste Ctrl-V Page Up PgUp Page Down PgDn Begin of Line Home End of Line End Begin of Text Ctrl-Home End of Text Ctrl-End Tab Tab 4.3 The Menus The SX editor ...
Page 22
The SX-Key/Blitz Interface Close Closes the source code file currently displayed in the editor window. You may also right-click on the file name in the open files list, and then left-click on the prompt that is displayed to close ...
Page 23
Copy Copies the selected text from the editor window and stores it in the Windows clipboard. Ctrl-C is the equivalent keyboard entry. Pastes the text from the Windows clipboard into the editor window starting at Paste the current cursor location. ...
Page 24
The SX-Key/Blitz Interface Make the necessary corrections to the source code, and assemble the code again, until no more errors are reported. The assembler may also generate warning messages that are shown in the same area, together with any ...
Page 25
View List Assembles the source code, and then opens another window that shows the contents of the list file generated by the assembler. Ctrl-L also displays the list file. The list file will be described in detail later in this ...
Page 26
The SX-Key/Blitz Interface 4.4.2 Find Window The Find window is accessed via the Find item on the Edit menu. Enter the text to be searched for in the “Find what” field. By default, the search direction is from the ...
Page 27
This window is similar to the Find window. Again, you can enter the text pattern to be searched for. In addition, you also can enter the replacement text. Also, you may select if only whole words should be found and ...
Page 28
The SX-Key/Blitz Interface 4.4.5 Configure Window This window is accessed via the Configure item on the Run menu and allows you to setup various properties of the software. We have already addressed the Serial Port section at the top ...
Page 29
Nevertheless, we strongly recommend that you use the SASM assembler for all new, or recently revised, source code. There are only a few modifications necessary to make legacy source code compatible with SASM (see Chapter 9 – Upgrading Existing Code ...
Page 30
The SX-Key/Blitz Interface The next option, Error BG Color, allows you to select the background color that shall be used to highlight any lines with errors after assembly. Again, click on the colored button to open the Color dialog ...
Page 31
The SX-Key Debugger The following is required to use the debug features: SX-Key Rev. E (or greater) – The SX-Blitz cannot be used for debugging. SX chip date code 9825 or later. No external clock source connected to the ...
Page 32
The SX-Key Debugger Registers $10 through $1F of all other banks are shown in the columns on the far right of the window. The bank offsets are labeled at the top of each column and the current bank is ...
Page 33
The assembly code box under the M and W register display in the center of the Registers window lists several contiguous instructions at once. The first three digits on each line is the hexadecimal address in program memory, followed by ...
Page 34
The SX-Key Debugger 5.1.2 The Debug Window The Debug window contains buttons for debugging functions. Each button has an associated shortcut key, as described in Table 2 – Debugger Buttons and Shortcut Keys, below. The Step button (or Alt-S) ...
Page 35
Button Shortcut Step Alt-S Walk Alt-W Run Alt-R Poll Alt-L Stop Alt-P Reset Alt-T Registers Alt-E Code Alt-D Watch Alt-C Reset Pos. none Quit Alt-Q The Debug windows are highly active and interactive displays. Every time the display is updated ...
Page 36
The SX-Key Debugger Jump to Code: Scrolls the window to display the first line that assembles into CPU instructions. Jump to Reset Line: Scrolls the window to display the line of code that will be executed upon reset. This ...
Page 37
Breakpoints and the Current Instruction The assembly code box and Code/List File window display a breakpoint as a red highlighted line and the next instruction to be executed as a blue highlighted line. The breakpoint can be set to ...
Page 38
The SX-Key Debugger Page 38 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 39
The Device Window The Device window is accessed via the Device item on the Run menu pressing Ctrl-I. You may also click the Device shortcut button in the editor’s toolbar. This window allows you to specify all ...
Page 40
The Device Window NOTE: To select an SX20 device, click on the SX18 selection. SX18 devices are no longer manufactured by Ubicom The Oscillator section specifies the fuse settings for the various clock sources, and oscillator modes that are ...
Page 41
SX chip was programmed with the code-protect fuse on. The ID field will always read properly, however. The Load Hex and Save Hex buttons may be used to load or save assembled object files. If ...
Page 42
The Device Window Page 42 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 43
The SASM Assembler This part of the manual describes the SASM assembler (integrated in the SX-Key Version 2.0 software) which is an enhanced version of Ubicom’s SASM. The SX-Key software 2.0 and above supports both assemblers, the Ubicom SASM ...
Page 44
The SASM Assembler 7.1 The Structure Assembly Program A typical SX assembly language program contains comments, directives, symbols, labels, expressions and mnemonic instructions as shown in the sample below. ;--------------------------------------- ;| XYZ Controller ;| (C) 1997 ...
Page 45
Comments Comments are optional messages usually used to document the source code. They are ignored by the assembler and may be placed almost anywhere in the program. A comment must be preceded by a semicolon (;). The following demonstrates ...
Page 46
The SASM Assembler Directive Description Assigns or reassigns a value to a symbol. This directive is used SET create and manipulate assemble-time variables. BREAK Defines a run-time breakpoint. Specifies that the following instructions should be, or ...
Page 47
Directive Description Specifies the starting RAM or EEPROM location of the code that ORG follows. RADIX Specifies the radix for numeric constants REPT Repeat block of code a specified number of times. ENDR RESET Specifies the starting location of the ...
Page 48
The SASM Assembler CASE temp EQU $01 Temp EQU $02 The above code would assemble properly and would have two distinct symbols, temp and Temp. NOTE: All directives, instructions and reserved words must be specified in upper case when ...
Page 49
Setting Description SX18/SX18AC/PINS18 SX20/SX20AC/PINS20 Specifies the device type SX28/SX28AC/PINS28 BANKS1 1 page, 1 bank BANKS2 2 pages, 1 bank BANKS4 4 pages, 4 banks BANKS8 4 pages, 8 banks OSCHS3 High speed crystal/res., 1MHz…75MHz * OSCHS2 High speed crystal/res., 1MHz…50MHz ...
Page 50
The SASM Assembler Setting Description SX48/SX48BD/PINS48 Specifies the device type SX52/SX52BD/PINS52 OSCHS3 High speed crystal/res., 1MHz…75MHz * OSCHS2 High speed crystal/res., 1MHz…50MHz * OSCHS1 High speed crystal/res., 1MHz…50MHz * OSCXT2 Normal crystal/res., 1MHz…24MHz * OSCXT1 Normal crystal/res., 32kHz…10MHz * ...
Page 51
The DS Directive The DS (define space) directive increments the location pointer during assembly. This may be used to cause the assembler to arrange sequential RAM assignments (arrays). For example: ORG $08 Array DS Other DS defines 3 bytes, ...
Page 52
The SASM Assembler 7.3.8 The ERROR Directive The ERROR directive emits a user-defined message for this source code line. The syntax for the ERROR directive is: ERROR [P1|2[W|C]]“<string>” During assembly, SASM performs two passes through the source code. The ...
Page 53
The ID Directive The ID (identification) directive is used to write up to eight bytes of text into the ID word of the SX chip. This is used to record a version number or other unique identification for the ...
Page 54
The SASM Assembler The following example demonstrates the use of the IF...ELSE directive. Delay EQU 10 Choice EQU 1 IF Delay >=9 mov $08, #5 add $09, #%011 ENDIF IF Choice = 0 mov $0A, #$1B ELSE mov $0A, ...
Page 55
With DriverOn = the Parallax Assembler reports an “Expected a label” error. 7.3.14 The INCLUDE Directive The INCLUDE directive allows the inclusion of one or more source code files in the main file that contains the include directive. Whenever the ...
Page 56
The SASM Assembler 7.3.15 The IRC_CAL Directive This directive specifies the calibration value for the internal RC oscillator. The syntax for the IRC_CAL directive is IRC_CAL IRC_SLOW | IRC_4MHZ | IRC_FAST When the options IRC_SLOW or IRC_FAST are specified, ...
Page 57
Option LIST C = <columns> LIST F = <format> LIST L = <list> LIST N = <lines> LIST P = <processor> LIST Q = <message number> LIST R = <radix> LIST W = <0|1|2> LIST X = <on/off> 7.3.17 The ...
Page 58
The SASM Assembler ORG location Note that the ORG directive does not dictate whether the location is in RAM or EEPROM. The assembler simply sets the location pointer as desired and the instructions or directives following the ORG will ...
Page 59
Within a repeat block, the percent sign (%) alone may be used to refer to the ...
Page 60
The SASM Assembler 7.3.23 The TITLE and STITLE Directives The TITLE or STITLE directives set up the text to be used in the top line of the list file. The syntax is: TITLE “<string>” STITLE “<string>” The text specified ...
Page 61
The following code snippet is an example of multiple WATCH directives and their output: LCounter EQU $08 Hcounter EQU $09 Flags EQU $0A String EQU $0B WATCH LCounter, 16, UDEC WATCH Flags.0, 1, UBIN WATCH Flags.1, 1, UBIN WATCH String, ...
Page 62
The SASM Assembler If the ZSTR format is used, the Watch window will display all bytes byte equal to zero the maximum length (specified by the count argument). The values in the Watch ...
Page 63
The ENDM Directive The ENDM directive takes the form: ENDM It simply marks the end of the macro declaration. 7.4.3 The EXITM Directive The EXITM directive takes the form EXITM If assembled, it causes an invocation to stop interpolating ...
Page 64
The SASM Assembler {macro definitions and other code appears above this point} M1 {arguments here} NOEXPAND M2 {arguments here} EXPAND M1 {arguments here} The above code will result in a list file with the first and last macro calls ...
Page 65
Macro Invocation Once defined, a macro is used by invoking it with appropriate actual values to be used in place of the formal parameters. When invoked, the macro body is interpolated in place of the invocation, with each reference ...
Page 66
The SASM Assembler Parameter substitution will occur at any point where the reference to a formal parameter can be identified, except within string constants. The notation "?token" will treat the actual value of the formal parameter named by "token" ...
Page 67
Macros with Formal Parameters by Count The following is a sample for a macro with one formal parameter: ; Sets the bank appropriately for all types of SX controllers ; _bank macro 1 bank \1 IFDEF SX48_52 IF \1 ...
Page 68
The SASM Assembler When this macro is used in a program to be run on an SX48/52 necessary that the symbol SX48_52 is defined prior to the first invocation of the _bank macro. 7.4.13 Macros with Formal ...
Page 69
EQU 10 index EQU $08 defines the symbol loop_count to be equal to the number 10, and the symbol index to be equal to the hexadecimal number 08. During assembly, everywhere the symbol loop_count appears in the code, the ...
Page 70
The SASM Assembler label. A macro label is the name of a macro block (see the MACRO directive in Section 7.3.15 – The Macro Directive) and is unique. Depending on the option you have selected in the Configuration window, ...
Page 71
All expressions are evaluated at assemble-time only; they are never reevaluated during run-time. This means symbols for unknowns, such as registers (which change at runtime), can not be included inside expressions. All constants and symbols within expressions may be 32-bit ...
Page 72
The SASM Assembler The second expression, above, will evaluate to 11; the expression within parentheses is evaluated first. The third expression, loop_count+10/5, will evaluate 7.8 Data Types The ...
Page 73
When you assemble this code with SASM, the directives in the first (ifdef) block will be read by the assembler, causing the use of an 8-level stack, and the expanded option register, and the RC clock calibration set to slow. ...
Page 74
The SASM Assembler At the end of the list file, there is a Cross Reference listing with all symbols used in the program, structured like in the following example: __SX_FREQ DATA __SX_IRC_CAL DATA __SX_RESET RESB _CheckEmergency ADDR ByteCnt VAR ...
Page 75
LIST you desire to suppress a warning only in a specific area of the code, you can surround the code like this: LIST mov w, #-200 LIST Q = -37 ...
Page 76
The SASM Assembler # Message 32 Unexpected EOF 33 Assume value is in HEXADECIMAL 34 Token length exceeds limit 35 Illegal character - Ignored 36 File register truncated to 5 bits 37 Literal truncated to 8 bits 38 Missing ...
Page 77
Message Total number of INCLUDE files 67 exceeded 31 Tab expanded list file line too long – 68 truncating No OSCxxx directive - using default 69 OSCRC 70 USER WARNING: <Message> Error Warning SASM Error ...
Page 78
The SASM Assembler 7.12 Reserved Words and Symbols Table 15 – SASM Reserved Words, below, contains all symbols that are internally defined in SASM, i.e. you may not use any of these words for labels or symbols in your ...
Page 79
The Parallax Assembler This chapter describes the Parallax assembler. We have added it for completeness, although we strongly recommend using the SASM assembler for new projects. You may use the Parallax assembler to re-build projects that have been developed ...
Page 80
The Parallax Assembler Setting Description SX18/SX18L SX28/SX28L Specifies the device type SX48 SX52 OSCHS3/OSCXTMAX High speed crystal/res., 1MHz…75MHz * OSCHS2/OSCXT5 High speed crystal/res., 1MHz…50MHz * OSCHS1/OSCXT4 High speed crystal/res., 1MHz…50MHz * OSCXT2/OSCXT3 Normal crystal/res., 1MHz…24MHz * OSCXT1 Normal crystal/res., ...
Page 81
Symbols Symbols are handled by the Parallax Assembler similar to SASM. Therefore, refer to Chapter 7.5 - Symbols for more details. 8.4 Labels Global, local, and macro Labels are also available in the Parallax Assembler. For more details about ...
Page 82
The Parallax Assembler Message Error message contains control characters Error message exceeds 64 characters EXITM/ENDM must be preceded by MACRO Expected “++” or “--“ Expected “,” Expected “,” or end-of-line Expected a binary operator or “)” Expected a constant ...
Page 83
Message Macro stack overflow Nothing to assemble Only one BREAK is allowed Port is out of range Redundant DEVICE parameter REPT count must be greater than 0 RESET address must be on first page Symbol exceeds 32 characters Symbol table ...
Page 84
The Parallax Assembler 8.8 Reserved Words and Symbols Table 18 – Parallax Assembler Reserved Words Parallax assembler, i.e. you may not use any of these words for a symbol or label. ADD DRT60MS * ADDB DRT60US * AND DRT960MS ...
Page 85
Upgrading Existing Code for SASM This chapter describes the most common changes that need to be made to use existing code for the Parallax Assembler with the SASM assembler. Add an IRC_CAL directive to all existing projects, usually below ...
Page 86
Upgrading Existing Code for SASM Page 86 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 87
SX Special Features and Coding Tips 10.1 Introduction The SX chip offers many configurable features. This chapter explains how to use many of these features, offers coding tips and demonstrates most topics with sample code. All examples are written ...
Page 88
SX Special Features and Coding Tips MODE Port A $0F TRIS_A $0E PLP_A $0D LVL_A $0C $0B $0A $09 $08 $07 - $00 * Port C not available on SX20 devices, Port D and E only available on SX48/52 ...
Page 89
Set output pins low ; MOV ra, #%0000 MOV rb, #%00000000 ; Port B bits 0-7 low MOV rc, #%00000000 ; Port C bits 0-7 low 10.2.2 Pull-Up Resistors Every I/O pin has optional internal pull-up resisters that can ...
Page 90
SX Special Features and Coding Tips 10.2.3 Logic Level Every I/O pin has selectable logic level control that determines the voltage threshold for a logic level The default logic level for all I/O pins is TTL ...
Page 91
The following code snippet demonstrates this: ; Logic Level Configuration ; MODE $0D MOV !ra,#%0000 MOV !rb,#%11110000 ; Port B bits 4-7 to TTL, bits 0-3 CMOS MOV !rc,#%00001111 ; Port C bits 4-7 to CMOS, bits 0-3 TTL MODE ...
Page 92
SX Special Features and Coding Tips To configure the I/O pins to Schmitt-Trigger input: 1) Set the MODE register to $0C (the value for Schmitt-Trigger register configuration). 2) Use the port configuration instruction to set the individual Schmitt-Trigger state ...
Page 93
The following code snippet demonstrates this: ; Edge Detection Configuration ; Start MODE $0A MOV !rb,#%11111111 ; Port B bits 0-7 to falling edge MODE $0F MOV !rb,#%11111111 ; Port B bits 0-7 to input Main MODE $09 MOV !rb,#%00000000 ...
Page 94
SX Special Features and Coding Tips and the flag indicating this will remain set until the program clears it. Additional transitions on that pin will not cause interrupts until the associated bit in the Pending register is cleared. To ...
Page 95
The following are points to remember with Wake-Up Interrupts: The interrupt routine must be located starting at address $0 in the SX program the SX program to clear the bits of the Pending register when future ...
Page 96
SX Special Features and Coding Tips ; Comparator Configuration ; MODE $08 MOV !rb,#%00000000 ; Enable comparator and result output MODE $0F MOV !rb,#%11111110 ; Port B bits 1-7 to input, bit 0 to input Main MODE $08 MOV ...
Page 97
The block diagram in Figure 16 – SX48/52 Multi-Function Timers, below, shows the components of one timer: Capture 2 (RB5/RC1) System Clock 8-Bit Prescaler External Clock (RB7/RC3) Multiplexer Capture 1 (RB4/RC0) Registers R1, R2 and the capture registers can be ...
Page 98
SX Special Features and Coding Tips duty cycle, the sum R1+R2 must remain constant, i.e. to change the duty cycle, increase the value of one register, and decrease the value of the other register by the same amount. In ...
Page 99
All About Interrupts The SX20/28 chip allows for up to nine sources of interrupts; eight external and one internal. The SX48/52 chip allows for sources of interrupts; 10 external and one internal. Any or all of ...
Page 100
SX Special Features and Coding Tips Multiple Interrupts: Using more than one interrupt, such as multiple external interrupts or both RTCC and external interrupts, can result in missed or, at best, jittery interrupt handling should one occur during the ...
Page 101
The following code snippet demonstrates this: DEVICE STACKX RESET Start ORG $0 Interrupt RETI ; RTCC Rollover Interrupt Configuration ; Start MOV !OPTION, #%10011111 Main NOP JMP Main The above code will cause the interrupt routine to be executed once ...
Page 102
SX Special Features and Coding Tips Event 1) RTCC rolls over 2) 3 cycles required to enter interrupt routine 3) Interrupt routine executes 4) –50 (206 in twos-compliment) is added to RTCC 5) RTCC rolls over again in exactly ...
Page 103
The following are points to remember with Wake-Up Interrupts: The interrupt routine must be located starting at address $0 in the SX program. The interrupt routine should take a maximum of 6 cycles less than the desired cycle time slot. ...
Page 104
SX Special Features and Coding Tips The following code snippet demonstrates this: RESET Main Idx EQU $08 ; 8-bit data table ; ORG $0 Table JMP PC+W RETW 'ABCDEFG' RETW 10, 100, 255, 0 Main MOV Idx, #$FF MainLoop ...
Page 105
The following code snippet demonstrates this: RESET Main Idx EQU $08 ; 8-bit data table , ORG $0 Table DW 'ABCDEFG' DW 10, 300, 4095 Store numbers Main MOV Idx, #Table MainLoop MOV M, #Table>>8 MOV W, Idx ...
Page 106
SX Special Features and Coding Tips The following code snippet demonstrates this: Start ORG $0 JMP @Routine ; Jump to proper page JMP Start Routine ORG $200 JMP @Start The @ symbol preceding the address causes the assembler to ...
Page 107
The following code snippet demonstrates this: ORG $0 ; Define the subroutine jump-table ; Sub1 JMP @_Sub1 Sub2 JMP @_Sub2 ; Start of main routines ; Start CALL @Sub1 JMP @Continue ORG $200 Continue CALL @Sub2 JMP @Start ORG $400 ...
Page 108
SX Special Features and Coding Tips Page 108 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 109
Appendix A: SX Features 11.1 Introduction The SX chip is a fully static CMOS MPU conservatively rated for (or 75) MHz operation. The SX provides 2K words of on-chip E²Flash program memory (4K words in SX48/52). ...
Page 110
Appendix A: SX Features All outputs capable of sinking/sourcing 30 mA Symmetrical drive on RA outputs (same Vdrop +/-) Two 16-bit timers count clock cycles, external events and generate interrupts and external signals (SX48/52 only) Page 110 SX-Key/Blitz Development ...
Page 111
Appendix B: Instruction Set Overview 12.1 Introduction The instruction set of the SX20/28/48/52 microcontrollers consists of 43 single-word basic instructions that are executed in one clock cycle, with the exception of JMP, CALL, and failed test instructions, like DECSZ, ...
Page 112
Appendix B: Instruction Set Overview Instruction Parameters ADD dest, src ADDB dest, {/} src_bit AND dest, src BANK dest CALL addr8 CJA op1, op2, addr9 CJAE op1, op2, addr9 CJB op1, op2, addr9 CJBE op1, op2, addr9 CJNE op1, ...
Page 113
Instruction Parameters OR dest, src PAGE addr12 RET RETI RETIW RETP RETW lit{, lit…} RL dest RR dest SB src_bit SC SETB dest_bit SKIP SLEEP SNB src_bit SNC SNZ STC STZ SUB dest, src SUBB dest, {/}src_bit SWAP dest SZ ...
Page 114
Appendix B: Instruction Set Overview 12.3 Single Word Instructions Table Single-Word Instructions on the next two pages lists all instructions that consume just one word of the SX E²Flash program memory: Instr. Parameters ADD fr, W ...
Page 115
Instr. Parameters Meaning NOP NOT fr NOT fr ð fr NOT W NOT W ð fr ð ð #literal W OR literal ð W ...
Page 116
Appendix B: Instruction Set Overview 12.4 Multi-Word Instructions The instructions in Table Multi-Word Instructions are translated into two or more single word instructions by the assembler. Important: All single-word skip instructions (see Table ...
Page 117
Instr. Parameters Translates to JNB op.bit, addr9 SB op.bit JNC addr9 SC JNZ addr9 SZ JZ addr9 SNZ MOV fr, #lit MOV W, #lit MOV fr1, fr2 MOV W, fr2 MOV fr, M MOV W, M MOV M, fr MOV ...
Page 118
Appendix B: Instruction Set Overview 12.5 Instruction Set Quick Reference This chart is a quick reference to command syntax, size, cycle time, CARRYX sensitivity and affected flags and registers. An explanation of the abbreviations used, can be found on ...
Page 119
C = cycles in Turbo mode (with a few exceptions, in non-Turbo mode, instructions take 4 times longer) grayed = adversely ...
Page 120
Appendix B: Instruction Set Overview Page 120 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 121
Appendix C: SX Instruction Set 13.1 Introduction The columns of each instruction definition table in this appendix contain important information about the instruction’s behavior, size and structure. The Command column lists all the available forms of the given command. ...
Page 122
Appendix C: SX Instruction Set The Affects column indicates the flags and registers the given instruction may affect. Depending on the kind of instruction, flags and/or registers are always affected, or only on certain results of the instruction. Table ...
Page 123
ADD dest, src Command Words 1) ADD fr ADD fr, #literal 3) ADD fr1, fr2 4) ADD W, fr Operation: src is added into dest. C will be set if an overflow occurs; otherwise, C will be cleared. ...
Page 124
Appendix C: SX Instruction Set BANK dest Command Words BANK fr Operation: Writes file registers bits 7 through 5 (on the SX20/28 through 4 (on the SX48/52) to the same bits in the file select register (FSR) ...
Page 125
CJAE op1, op2, addr9 Command Words 1) CJAE fr, #literal, addr9 2) CJAE fr1, fr2, addr9 Operation: op1 is compared to op2. If op1 is greater than or equal to op2, a jump to addr9 is executed left ...
Page 126
Appendix C: SX Instruction Set CJE op1, op2, addr9 Command Words 1) CJE fr, #literal, addr9 2) CJE fr1, fr2, addr9 Operation: op1 is compared to op2. If op1 is equal to op2, a jump to addr9 is executed. ...
Page 127
CLR dest Command Words 1) CLR fr 2) CLR W 3) CLR !WDT Operation: dest is cleared set command #1 and #2 while TO and PD are set command #3. ...
Page 128
Appendix C: SX Instruction Set CSAE op1, op2 Command Words 1) CSAE fr, #literal 2) CSAE fr1, fr2 Operation: op1 is compared to op2. If op1 is greater than or equal to op2, the following instruction word is skipped. ...
Page 129
CSBE op1, op2 Command Words 1) CSBE fr, #literal 2) CSBE fr1, fr2 Operation: op1 is compared to op2. If op1 is less than or equal to op2, the following instruction word is skipped left holding the result ...
Page 130
Appendix C: SX Instruction Set CSNE op1, op2 Command Words 1) CSNE fr, #literal 2) CSNE fr1, fr2 Operation: op1 is compared to op2. If op1 is not equal to op2, the following instruction word is skipped ...
Page 131
DJNZ dest, addr9 Command Words 1) DJNZ fr, addr9 Operation: dest is decremented. If the result is not 0, a jump to addr9 is executed. Z will be set the result was 0; otherwise, Z will be ...
Page 132
Appendix C: SX Instruction Set IREAD Command Words 1) IREAD Operation: The instruction or value at the 12-bit location MODE:W is read and stored into the MODE:W bits. This instruction can be used to read values in tables created ...
Page 133
JNB src_bit, addr9 Command Words 1) JNB op.bit, addr9 Operation: If src_bit is not set, a jump to addr9 is executed. JNC addr9 Command Words 1) JNC addr9 Operation: If the carry flag is not set, a jump to addr9 ...
Page 134
Appendix C: SX Instruction Set MODE src Command Words 1) MODE literal Operation: The lower 4 bits of src are moved into the Mode register. This command is the same as MOV M, #literal. Use this command to initiate ...
Page 135
MOV dest, src Command Words 1) MOV fr MOV fr, #literal 3) MOV fr1, fr2 4) MOV fr MOV MOV W, /fr 7) MOV W, fr-W 8) MOV W, ++fr 9) MOV W, ...
Page 136
Appendix C: SX Instruction Set MOVB dest_bit, src_bit Command Words 1) MOVB op.bit1, op.bit2 2) MOVB op.bit1, /op.bit2 Operation: src_bit is moved into dest_bit in command #1. The one’s complement of src_bit is moved into dest_bit in command #2. ...
Page 137
NOT dest Command Words 1) NOT fr 2) NOT W Operation: dest is converted into its one’s complement value. Z will be set if the result was 0; otherwise, Z will be cleared. The MOV W,/fr command is similar to ...
Page 138
Appendix C: SX Instruction Set RETI Command Words 1) RETI Operation: W, STATUS (except TO & PD), FSR and PC are popped off the shadow registers and execution proceeds with the instruction following the jump to interrupt. RETIW Command ...
Page 139
RL dest Command Words Operation: dest is rotated left one bit. On entry, C must hold the value to be shifted into the least-significant bit of the dest value. On exit, C will hold the previous most-significant ...
Page 140
Appendix C: SX Instruction Set SETB src_bit Command Words 1) SETB op.bit Operation: src_bit is set to 1. SKIP Command Words 1) SKIP Operation: The following instruction word is skipped. Note: Only one word is skipped by this instruction. ...
Page 141
SNC Command Words 1) SNC Operation cleared, the following instruction word is skipped. Note: Only one word is skipped by this instruction. To avoid strange results, make sure that any instruction following SNC is a single-word instruction. ...
Page 142
Appendix C: SX Instruction Set SUB dest, src Command Words 1) SUB fr SUB fr1, #literal 3) SUB fr1, fr2 Operation: src is subtracted from dest. C will be cleared underflow occurred; otherwise, ...
Page 143
SZ Command Words 1) SZ Operation set, the following instruction word is skipped. Note: Only one word is skipped by this instruction. To avoid strange results, make sure that any instruction following single-word instruction. ...
Page 144
Appendix C: SX Instruction Set Page 144 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 145
Appendix D: The SX Tech Board The Parallax SX Tech Board is a learning tool for 28-pin DIP SX microcontrollers. The led28.src file, included with the SX-Key installation program, demonstrates a simple program using the SX Tech Board and ...
Page 146
Appendix D: The SX Tech Board Breadboard area for prototyping I/O pin headers adjacent to breadboard Reset button 14.2 Connecting and Downloading See Chapter 3.1 – Connecting and Downloading to the SX Tech Board for steps to connect and ...
Page 147
SX Tech Board Schematic 14 Appendix D: The SX Tech Board Figure Tech Board Schematic MCLR 8 RTCC 9 RA3 10 RA2 11 RA1 12 RA0 13 SX-Key/Blitz Development ...
Page 148
Appendix D: The SX Tech Board Page 148 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 149
Appendix E: SX Data Sheet 15.1 Pinout Information and Descriptions Note: Drawings are not to scale or proportion. Some devices are no longer available from Ubicom, they are shown here for completeness only. 15 Appendix E: SX Data Sheet ...
Page 150
Appendix E: SX Data Sheet Name Type Input Levels RA0 – RA7* I/O TTL/CMOS RB0 - RB2 I/O TTL/CMOS/ST RB3 - RB7 I/O TTL/CMOS/ST RC0 - RC7* I/O TTL/CMOS/ST RD0 – RE7* I/O TTL/CMOS/ST RTCC I ST MCLR I ...
Page 151
Instruction Pipeline Stage of Instruction State of Clock There are several stages an instruction must go through to actually execute within the SX chip. Specifically, there are four stages that are collectively referred to as the pipeline, and are ...
Page 152
Appendix E: SX Data Sheet – SX48/52 Register Map demonstrate the structure of the registers for the SX20/28 and the SX48/52, respectively. In all SX instructions, bit 4 of the register address operand determines whether the global registers are ...
Page 153
Special Function Registers Special function registers are registers used by the CPU to control the operation of the device. The special function registers are contained within the first seven to ten locations of the global RAM bank as shown ...
Page 154
Appendix E: SX Data Sheet (JMP). This is necessary to achieve computed jumps and subroutine calls across page boundaries in code memory. Only 11 bits are used in SX20/28 parts. See The Jump Instruction for examples detailing how the ...
Page 155
Bit 1: Digit Carry (DC) After an addition: Set (1) Clear ( carry from bit 4 has occurred After a subtraction: Set (1) Clear ( borrow from bit 4 has occurred Bit 0: Carry (C) After ...
Page 156
Appendix E: SX Data Sheet Special function and general-purpose register addresses $00 - $0F are ‘global’ in that they can always be accessed regardless of the contents of the FSR. Special function register $07 (RC) is available as general ...
Page 157
General-purpose registers can only be accessed within one bank at a time. The general-purpose registers are numbered $10 through $1F. The active bank is controlled by the upper 3 bits of the FSR (SX20/28) as shown in Figure 26 – ...
Page 158
Appendix E: SX Data Sheet Figure 27 - SX48/52 General-Purpose Register addressing (direct) fr (5-bit address in instruction Global $00- $01- RTCC $02- $0F- To ensure you are writing to the desired register you must first ...
Page 159
Desired Bank This example clears register $10 in banks 3 and 6 on the SX20/28: mov FSR, #$60 clr $10 mov FSR, #$C0 clr $10 This example clears register $10 in banks 3 and 6 on the SX48/52: mov FSR, ...
Page 160
Appendix E: SX Data Sheet 15.2.11 Indirect Addressing To access any register via indirect addressing, simply move the 8-bit address of the register you wish to access into the FSR and use IND ($00) as the operand. fr (5-bit ...
Page 161
Global $00- $01- RTCC $02- $0F- This example for the SX20/28 will clear every General Purpose RAM register on every bank using indirect addressing. Init mov FSR, #$10 Loop clr inc setb FSR.4 cjne ...
Page 162
Appendix E: SX Data Sheet Zero EQU $00 One EQU $30 Two EQU $50 Three EQU $70 Four EQU $90 Five EQU $B0 Six EQU $D0 Seven EQU $F0 bank Three clr $10 bank Six mov $10,#1 15.2.13 The ...
Page 163
Jumping Across Pages When a JMP instruction is executed and the intended destination different page, you must set the page select bits to point to the desired page before the jump occurs. This can be done ...
Page 164
Appendix E: SX Data Sheet 15.2.16 Calling Across Pages When it is necessary to call a subroutine that exists on a different page, you must set the page select bits to point to the desired ...
Page 165
The Stack The stack is an area of memory used to remember where to return to once a subroutine is complete. The stack is eight levels deep with the Stack Extend (STACKX) option set and two levels deep by ...
Page 166
Appendix E: SX Data Sheet 15.2.20 The Pop When a return instruction is executed, the stack is popped. Specifically, the content of Stack 1 is copied to the program counter and the content of each address in the stack ...
Page 167
W, STATUS, and the FSR, which were preserved during interrupt handling. RETIW behaves the same as RETI but also compensates the RTCC by adding the value the RTCC. 15.3 Port ...
Page 168
Appendix E: SX Data Sheet 15.3.2 Port B Registers There are eight registers used to configure the I/O pins of Port B. The TRIS_B register configures the data direction of the Port B pins as input or output. The ...
Page 169
ST_B – Schmitt-Trigger Enable Register A bit set to ‘1’ in this register disables the Schmitt-Trigger input on the corresponding port pin. A bit set to ‘0’ in this register enables the Schmitt-Trigger input on the corresponding port pin. ...
Page 170
Appendix E: SX Data Sheet 15.3.2.8 CMP_B – Comparator Enable Register EN - Comparator Enable enabled disabled OE - Comparator Output Enable enabled disabled Rsvd - Reserved for future use RES ...
Page 171
PLP_C – Pull-Up Resistor Enable Register A bit set to ‘1’ in this register disables the weak pull-up resistor on the corresponding port pin. A bit set to ‘0’ in this register enables the weak pull-up resistor on the ...
Page 172
Appendix E: SX Data Sheet mov M, #$0F mov !RA, #$03 mov M, #$0E mov !RA, #$01 mov M, #$0D mov !RA, #$02 Table 32 – SX20/28 Mode Register, below, defines the allowed mode values and their functions for ...
Page 173
Mode register (SX48/52) Similar to the SX20/28, instructions like mov !ra, w are used to access the control registers with the MODE register previously set to a value to select the correct register type. Table 33 - SX48/52 Mode ...
Page 174
Appendix E: SX Data Sheet 15.4.3 Option The OPTION register is a run-time writable register used to configure the RTCC and the Watchdog Timer. The size of this register is affected by the OPTIONX device setting. When OPTION Extend ...
Page 175
Fuses register. See “Device Directive” in Chapter 7.3.1 for additional information. 15.5 Interrupts 15.5.1 Description Sometimes a particular task or event must have the immediate attention of the ...
Page 176
Appendix E: SX Data Sheet In addition, the SX48/52 devices also allow interrupts on certain timer events, like overflow, compare match, and input capture. 15.5.4 RB0-RB7 Interrupt The SX offers eight sources of external interrupts; a change of state ...
Page 177
Table 34 – External Component Selection for Crystals (Vdd = 5V) OSC Setting Crystal Frequency OSCXT1 OSCXT2 OSCXT2 OSCXT2 OSCHS1 Figure with External Ceramic Resonator Xtal Table 35 - Component Selection for Murata Ceramic Resonators (Vdd = ...
Page 178
Appendix E: SX Data Sheet Clock signal from external system 15.6.1.2 External RC Mode For timing insensitive applications, the RC device option offers additional cost savings. The RC oscillator frequency is a function of the supply voltage, the resistor ...
Page 179
Internal RC Mode The SX offers an internal 4 MHz RC oscillator for timing insensitive operations. Using the internal oscillator reduces external component count and system cost. The internal oscillator is configured via the OSC4MHZ through OSC32KHZ device settings ...
Page 180
Appendix E: SX Data Sheet Page 180 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc. ...
Page 181
Index _ __SASM pre-defined constant directive ADD instruction, 123 ADDB instruction, 123 Addressing, direct, 156 Addressing, indirect, 160 AND instruction, 123 Architecture, SX, 150 Assemble, 23 Assembler directives, 45 Assembler options, 28 Assembler selection, ...
Page 182
Index Edit - Redo, 22 Edit - Run, 24 Edit - Undo, 22 Edit - View List, 25 Edit menu, 22 Editor, 20 Editor selection, 29 Editor, shortcut keys, 21 END directive, 51 ENDM directive, 63 EQU directive, 47 ...
Page 183
M M register, 173 MACRO directive, 62 Macro invocation, 65 Macro label, 70 Macros, 62 Macros, examples, 66 Macros, formal parameters, 64 Macros, formal parameters by count, 67 Macros, formal parameters by name, 68 Macros, parameters, 62 Macros, quoting, 65 ...
Page 184
Index S SASM Assembler, 43 Save file, 22 Save file as, 22 Save Hex instruction, 139 SC instruction, 139 Schmitt-Trigger configuration, 91 Serial port selection, 28 SETB instruction, 140 Shortcut keys (Editor), 21 SKIP instruction, 140 SLEEP ...