EVAL-ADT7462EBZ ON Semiconductor, EVAL-ADT7462EBZ Datasheet - Page 25

no-image

EVAL-ADT7462EBZ

Manufacturer Part Number
EVAL-ADT7462EBZ
Description
BOARD EVALUATION FOR ADT7462
Manufacturer
ON Semiconductor
Type
Temperature Sensorr
Datasheet

Specifications of EVAL-ADT7462EBZ

Contents
Evaluation Board
For Use With/related Products
ADT7462
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
voltage applied to the CPU to ensure that they match within
an acceptable range. This acceptable range is programmable
in the ADT7462.
VID code is stored in the VID Value register (0x97), which
can be read back over the SMBus.
Configuration Register 1 (0x10) to 1. See Table 17 and
Table 18 for information on which pin should be connected
to each VID line. When VID monitoring is enabled, all seven
pins are automatically configured as VID inputs. It is not
possible to select six pins as VID inputs and use the
remaining pin as an alternate function.
VID Value Register (0x97)
Bit 0 = VID0 (reflects the logic state of Pin 1)
Bit 1 = VID1 (reflects the logic state of Pin 2)
Bit 2 = VID2 (reflects the logic state of Pin 3)
Bit 3 = VID3 (reflects the logic state of Pin 4)
Bit 4 = VID4 (reflects the logic state of Pin 31)
Bit 5 = VID5 (reflects the logic state of Pin 32)
Bit 6 = VID6 (reflects the logic state of Pin 28)
specifications. The default option supports the VR10
specification. To switch to the VR11 specification, set Bit 6
of Configuration Register 0 (0x00) to 1. VR11 is defined as
eight bits; the ADT7462 monitors only seven VID lines (see
Table 17).
should be connected to ground when monitoring VR10 VID
codes. VID6 reports a 0.
Table 17. VR11 VID Codes
Table 18. VR10 VID Codes
The VID lines are monitored by the ADT7462, and the
VID monitoring is enabled by setting Bit 7 (VIDs) of Pin
The ADT7462 supports both the VR10 and the VR11
VR10 requires only six VID lines (see Table 18). Pin 28
VID Number
VID Number
VID6
VID5
VID4
VID3
VID2
VID1
VID0
VID6
VID5
VID4
VID3
VID2
VID1
VID0
Pin No.
Pin No.
28
32
31
28
32
31
4
3
2
1
4
3
2
1
Unused, connect to GND
12.5 mV
6.25 mV
12.5 mV
Voltage
400 mV
200 mV
100 mV
Voltage
400 mV
200 mV
100 mV
50 mV
25 mV
60 mV
25 mV
http://onsemi.com
25
Dynamic VID Monitoring
purpose of the VID code is to tell the voltage controller what
V
voltage applied to the processor changes as the power
requirements of the processor change. The VID is compared
with V
LSB value for V
1.6 V. The VID code is sampled by the ADT7462 every
11 ms and is stored in Register 0x97. Once the VID code has
been stable (that is, does not change) for 55 ms, the measured
V
table used is for either the VR10 or the VR11 specification
(set by Bit 6 of Register 0x00). If the VID code and the
measured V
ALERT is generated.
be within a window controlled by the VID high and low
limits. The VID is compared with V
holds the 4−bit VID high and low limits. The high limit has
a range of 0 mV to 375 mV with a resolution of 25 mV (four
bits). The low limit has a range of 0 mV to −187.5 mV with
a resolution of 12.5 mV (four bits). The high limit is used in
a greater−than comparison, and the low limit is used in a
less−than−or−equal−to comparison. Note that if both limits
are set to 0x00, because the low limit is less than or equal to
the comparison, an ALERT always results. Therefore, the
minimum value for low limit is 0x01.
match to within the programmed limit, Status Bit 6 of the
digital status register is set (Register 0xBE). This, in turn,
can generate an ALERT if it is not masked.
Example
VID high limit: 100 mV (Register 0x78), four MSBs set to
0100.
VID low limit: 50 mV (Register 0x78), four LSBs set to 0100.
VID value equates to 1.1 V. This is the read VID decoded,
using either VR10 or VR11 tables.
V
an ALERT is generated.
status register. If the VID code and V
within the programmed window (that is, the error condition
that caused the ALERT has gone away), then the status bit
is reset and so is the ALERT.
can be found on the Intel website. See the Voltage Regulator
Module (VRM) and Enterprise Voltage Regulator−Down
(EVRD) 10.0 Design Guidelines, Page 18 and Page 19, for
additional information.
CCP
CCP
CCP1
The ADT7462 supports dynamic VID monitoring. The
The VID values can represent voltages from 0.8375 V to
The VID value decoded and the V
If the V
V
To clear an ALERT generated in this way, read the digital
The VID to V
CCP1
is then compared with the VID code. The comparison
voltage should be applied to the CPU. The V
CCP1
value is outside this window, the status bit is set and
must be in the window of 1.05 V to 1.2 V. If the
CCP
only. Note that when the VIDs are enabled, the
CCP
voltage measured and the VID code do not
CCP
CCP1
do not match within a certain limit, an
voltage tables for both VR10 and VR11
becomes 0.0125 V (see Table 12).
CCP1
CCP
CCP
only. Register 0x78
measurement must
are now matching
CCP

Related parts for EVAL-ADT7462EBZ