CSC10A0110K0JPA Vishay, CSC10A0110K0JPA Datasheet - Page 4

• Manufacturer Part Number: CSC10A0110K0JPA
• Description: RES NET 10K OHM 10P 9RES SIP
• Manufacturer: Vishay
• Series: CSCr

Specifications of CSC10A0110K0JPA

• Resistance (ohms): 10K
• Number Of Resistors: 9
• Circuit Type: Bussed
• Temperature Coefficient: ±250ppm/°C
• Tolerance: ±5%
• Power Per Element: 200mW
• Number Of Pins: 10
• Package / Case: 10-SIP
• Size / Dimension: 0.990" L x 0.098" W (25.15mm x 2.49mm)
• Height: 0.195" (4.95mm)
• Mounting Type: Through Hole
• Operating Temperature: -55°C ~ 125°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Document Number: 31509
Revision: 07-Jun-10
CIRCUIT APPLICATIONS
01 Schematic
03 Schematic
05 Schematic
PERFORMANCE
TEST
Thermal Shock
Short Time Overload
Low Temperature Operation
Moisture Resistance
Resistance to Soldering Heat
Shock
Vibration
Load Life
Terminal Strength
Insulation Resistance
Dielectric Withstanding Voltage
1
1
1
2
2
2
3
3
3
4
1000 h at + 70 °C, rated power applied 1.5 h “ON”, 0.5 h “OFF” for full
Thick Film Resistor Networks, Single-In-Line,
Leads immersed in + 350 °C solder to within 1/16" of body for 3 s
R
R
1
2
n-1
For technical questions, contact:
n-1
12 h at maximum of 20 g's between 10 Hz and 2000 Hz
240 h with humidity ranging from 80 % RH to 98 % RH
No evidence of arcing or damage (200 V
n-1
1000 h period. Derated according to the curve.
n
45 min at full rated working voltage at - 65 °C
n
5 cycles between - 65 °C and + 125 °C
Conformal Coated SIP
n
2.5 x rated working voltage, 5 s
Total of 18 shocks at 100 g's
10 000 MΩ (minimum)
4.5 pound pull for 30 s
CONDITIONS
* “A” profile standard, “B” Profile available.
* “A” Profile standard, “B” Profile available.
The CSCxxx01 single-in-line resistor networks provide the user with
nominally equal resistors, each connected to a common pin
(pin no. 1). Commonly used in the following applications:
• “Wired OR” Pull-up
• Power Gate Pull-up
• MOS/ROM Pull-up/Pull-down
The CSCxxx03 single-in-line resistor networks provide the user with
nominally equal resistors. Each resistor is isolated from all others.
Commonly used in the following applications:
• “Wired OR” Pull-up
• Power Driven Pull-up
• Power Gate Pull-up
• Line Termination
The CSCxxx05 circuits contain series pairs of resistors. Each series
pair is connected between two common lines. The junction of these
resistor pairs is connected to the input terminals. The 05 circuits are
designed for TTL dual-line termination and pulse squaring.
* “A” profile standard, “B” Profile available.
[e-mail]
RMS
for 1 min)
Dual Terminator
Isolated
Bussed
• Long-Line Impedance Balancing
• LED Current Limiting
• ECL Output Pull-down
• TTL Input Pull-down
• Open Collector Pull-up
• TTL Input Pull-down
• TTL Unused Gate Pull-up
MAX. ΔR (TYPICAL TEST LOTS)
± 0.50 % ΔR
± 0.25 % ΔR
± 0.25 % ΔR
± 1.00 % ΔR
± 0.25 % ΔR
± 0.25 % ΔR
± 0.25 % ΔR
± 1.00 % ΔR
± 0.25 % ΔR
Vishay Dale
-
-
www.vishay.com
CSC
4