UMK105CG180JV-F Taiyo Yuden, UMK105CG180JV-F Datasheet - Page 13

• Manufacturer Part Number: UMK105CG180JV-F
• Description: CAP CERM 18PF 50V C0G 0402
• Manufacturer: Taiyo Yuden
• Series: UMKr

Specifications of UMK105CG180JV-F

• Capacitance: 18pF
• Voltage - Rated: 50V
• Tolerance: ±5%
• Temperature Coefficient: C0G, NP0
• Mounting Type: Surface Mount, MLCC
• Operating Temperature: -55°C ~ 125°C
• Applications: General Purpose
• Package / Case: 0402 (1005 Metric)
• Size / Dimension: 0.039" L x 0.020" W (1.00mm x 0.50mm)
• Thickness: 0.50mm
• Dielectric Characteristic: C0G / NP0
• Capacitance Tolerance: ± 5%
• Voltage Rating: 50VDC
• Capacitor Case Style: 0402
• No. Of Pins: 2
• Capacitor Mounting: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Ratings: -
• Lead Spacing: -
• Other names: 587-1950-2; UMK105 CG180JV-F

Precautions on the use of Multilayer Ceramic Capacitors
2.PCB Design
△
！
PRECAUTIONS
当社カタログをご使用の際には 「当社製品に関するお断り」 を必ずお読みください。
Stages
（Capacitor layout on panelized [breakaway] PC boards）
Pattern configurations
1. After capacitors have been mounted on the boards, chips
can be subjected to mechanical stresses in subsequent
manufacturing processes （PCB cutting, board inspection,
mounting of additional parts, assembly into the chassis, wave
soldering the reflow soldered boards etc.） For this reason,
planning pattern configurations and the position of SMD ca-
pacitors should be carefully performed to minimize stress.
Precautions
1-1. The following are examples of good and bad capacitor layout; SMD capacitors should
1-2. To layout the capacitors for the breakaway PC board, it should be noted that the
1-3. When breaking PC boards along their perforations, the amount of mechanical stress
LWDC Recommended land dimensions for reflow-soldering
Mixed mounting
of SMD and
leaded compo-
nents
Component
placement close
to the chassis
Hand-soldering
of leaded
components
near mounted
components
Horizontal
component
placement
（2） Examples of good and bad solder application
Deflection of
be located to minimize any possible mechanical stresses from board warp or deflection.
amount of mechanical stresses given will vary depending on capacitor layout. The
example below shows recommendations for better design.
on the capacitors can vary according to the method used. The following methods
are listed in order from least stressful to most stressful: push-back, slit, V-grooving,
and perforation. Thus, any ideal SMD capacitor layout must also consider the PCB
splitting procedure.
Type
the board
A
B
C
Items
W
L
0.18∼0.22 0.25∼0.3 0.5∼0.7
0.2∼0.25 0.3∼0.4
0.9∼1.1
0.52
105
1.0
Not recommended
△
！
1.5∼1.7
Not recommended
50.8
Please read the "Notice for TAIYO YUDEN products" before using this catalog.
107
1.6
Technical considerations
（unit: mm）
0.4∼0.5
1.9∼2.1
1.25
212
2.0
Recommended
Recommended
2/6
111
4