AD7823 Analog Devices, AD7823 Datasheet
AD7823
Specifications of AD7823
Available stocks
Related parts for AD7823
AD7823 Summary of contents
Page 1
... high speed, low power, space saving ADC solution. 2. Low Power, Single Supply Operation The AD7823 operates from a single 2 5.5 V supply and typically consumes only power. The power dissipa- tion can be significantly reduced at lower throughput rates by using the automatic power-down mode, e.g throughput rate of 10 kSPS the power consumption is only 570 µ ...
Page 2
... AD7823–SPECIFICATIONS Parameter DYNAMIC PERFORMANCE 1, 2 Signal to (Noise + Distortion) Ratio 1 Total Harmonic Distortion 1 Peak Harmonic or Spurious Noise 2 Intermodulation Distortion 2nd Order Terms 3rd Order Terms DC ACCURACY Resolution 1 Relative Accuracy 1 Differential Nonlinearity (DNL) 1 Gain Error 1 Offset Error 1 Total Unadjusted Error Minimum Resolution for Which ...
Page 3
... LSB –40°C to +125°C ± 1 LSB –40°C to +125° 200mA TO OUTPUT PIN C L 50pF I OH 200 A AD7823 Data Valid Delay OUT = 5 V ± 10% and the true bus relinquish time 8 Branding Package Information Option N-8 SO-8 C2Y RM-8 1.6V ...
Page 4
... Convert Start. Falling edge puts the track-and-hold into hold mode and initiates a conversion. A rising edge on the CONVST pin enables the serial port of the AD7823. This is useful in multipackage applications where a number of devices share the same serial bus. The state of this pin at the end of conversion also determines whether the part is powered down or not. ...
Page 5
... N-bit converter with a sine wave input is given by: Signal to (Noise + Distortion) = (6.02N + 1.76) dB Thus for an 8-bit converter, this is 50 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7823 it is defined as ...
Page 6
... V IN+ CHARGE REDISTRIBUTION DAC CONTROL LOGIC The analog input of the AD7823 is made pseudo dif- ferential pair, V CLOCK OSC signal is applied to V the sampling capacitor is connected to V see Figure 8. This input scheme can be used to remove offsets that exist in a system. For example system had an offset of ...
Page 7
... ADC TRANSFER FUNCTION The output coding of the AD7823 is straight binary. The designed code transitions occur at successive integer LSB values (i.e., 1 LSB, 2 LSBs, etc.). The LSB size fer characteristic for the AD7823 is shown in Figure 11 below. 111...111 111...110 111...000 011...111 000 ...
Page 8
... V. If the power-up time is 1.5 µs operation is 10.5 mW and the conversion time is 5 µs, then the AD7823 can be said to dissipate 10.5 mW for 6.5 µs (worst case) during each conver- sion cycle. If the throughput rate is 10 kSPS, the cycle time is 100 µs, and the average power dissipated during each cycle is (6.5/100) × ...
Page 9
... CONVST signal low until the end of the conversion. The timing diagram in Figure 15 shows how to operate the part in this mode. If the AD7823 is powered down, the rising edge of the CONVST pulse causes the part to power up. When the part has powered up (≈ 1.5 µs after the rising edge of CONVST), the CONVST signal is brought low, and a conversion is initiated on this falling edge of the CONVST signal ...
Page 10
... AD7823 MICROPROCESSOR INTERFACING The serial interface on the AD7823 allows the parts to be directly connected to a range of many different microprocessors. This section explains how to interface the AD7823 with some of the more common microcontroller serial interface protocols. AD7823 to PIC16C6x/7x The PIC16C6x Synchronous Serial Port (SSP) is configured as an SPI Master with the Clock Polarity Bit = 0 ...
Page 11
... PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.043 (1.09) 0.006 (0.15) 0.037 (0.94) 0.002 (0.05) 0.018 (0.46) SEATING 0.011 (0.28) 0.008 (0.20) PLANE 0.003 (0.08) AD7823 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.0196 (0.50 0.0099 (0.25) 0.0500 (1.27) 0.0160 (0.41) 0.120 (3.05) 0.112 (2.84 0.028 (0.71) 0.016 (0.41) ...