AD783 Analog Devices, AD783 Datasheet

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AD783

Manufacturer Part Number
AD783
Description
High Speed, Monolithic Sample-and-Hold Amplifier (SHA)
Manufacturer
Analog Devices
Datasheet

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a
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
PRODUCT DESCRIPTION
The AD783 is a high speed, monolithic sample-and-hold
amplifier (SHA). The AD783 offers a typical acquisition time
of 250 ns to 0.01%. The AD783 is specified and tested for hold
mode total harmonic distortion with input frequencies up to
100 kHz. The AD783 is configured as a unity gain amplifier
and uses a patented self-correcting architecture that minimizes
hold mode errors and ensures accuracy over temperature. The
AD783 is self-contained and requires no external components
or adjustments.
The AD783 retains the held value with a droop rate of 0.02 V/
mance make the AD783 ideal for high speed 12- and 14-bit
analog-to-digital converters.
The AD783 is manufactured on Analog Devices’ ABCMOS
process which merges high performance, low noise bipolar
circuitry with low power CMOS to provide an accurate, high
speed, low power SHA.
The J grade device is specified for operation from 0 C to +70 C
and the A grade from –40 C to +85 C. The J and A grades are
available in 8-pin cerdip and SOIC packages. The military
temperature range version is specified for operation from –55 C
to +125 C and is available in an 8-pin cerdip package. For
details refer to the Analog Devices Military Products Databook or
AD783/883B data sheet.
*Protected by U.S. Patent Number 4,962,325.
s. Excellent linearity and hold mode dc and dynamic perfor-
FEATURES
Acquisition Time to 0.01%: 250 ns Typical
Low Power Dissipation: 95 mW
Low Droop Rate: 0.02 V/ s
Fully Specified and Tested Hold Mode Distortion
Total Harmonic Distortion: –85 dB
Aperture Jitter: 50 ps Maximum
Internal Hold Capacitor
Self-Correcting Architecture
8-Pin Mini Cerdip and SOIC Packages
PRODUCT HIGHLIGHTS
1. Fast acquisition time (250 ns), low aperture jitter (20 ps) and
2. Low droop (0.02 V/ s) and internally compensated hold
3. Low power (95 mW typical), complete functionality and
4. The AD783 requires no external components or adjustments.
5. The AD783 is an excellent choice as a front-end SHA for
6. Fully specified and tested hold mode distortion guarantees
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
fully specified hold mode distortion make the AD783 an
ideal SHA for sampling systems.
mode error result in superior system accuracy.
small size make the AD783 an ideal choice for a variety of
high performance applications.
high speed analog-to-digital converters such as the AD671,
AD7586, AD674B, AD774B, AD7572 and AD7672.
the performance of the SHA in sampled data systems.
Sample-and-Hold Amplifier
COMMON
Complete Very High Speed
FUNCTIONAL BLOCK DIAGRAM
V
NC
CC
IN
1
2
3
4
NC = NO CONNECT
X1
AD783
AD783*
8
7
6
5
Fax: 617/326-8703
OUT
S/H
NC
V
EE

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AD783 Summary of contents

Page 1

... The AD783 is self-contained and requires no external components or adjustments. The AD783 retains the held value with a droop rate of 0. Excellent linearity and hold mode dc and dynamic perfor- mance make the AD783 ideal for high speed 12- and 14-bit analog-to-digital converters. The AD783 is manufactured on Analog Devices’ ...

Page 2

... TEMPERATURE RANGE Specified Performance (J) Specified Performance (A) NOTES 1 Specified and tested over an input range of 2.5 V. Specifications subject to change without notice. with 5 –5 V 5%, C MAX CC EE AD783J/A Min –30 –5 –5 –2.5 2.0 4. –40 –2– = pF, unless otherwise noted) L Typ Max ...

Page 3

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD783 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 4

... AD783–Typical Characteristics 100 1k FREQUENCY – Hz Power Supply Rejection Ratio vs. Frequency 200 150 100 50 0 –50 –100 –150 –200 0 –2.5 INPUT VOLTAGE – V Bias Current vs. Input Voltage 10.0 V+ V– 1.0 0.1 0.01 0.001 10k 100k 1M Droop Rate vs. Temperature, V 300 250 200 0 +2 ...

Page 5

... Both input and output are treated as a single-ended signal, referred to common. The AD783 utilizes a proprietary circuit design which includes a self-correcting architecture. This sample-and-hold circuit corrects for internal errors after the hold command has been given, by compensating for amplifier gain and offset errors, and charge injection errors ...

Page 6

... The nominal hold mode offset is specified for input condition. Over the in- put range of –2 +2.5 V, the AD783 is also characterized for an effective gain error and nonlinearity of the held value, as shown in Figure 2. As indicated by the AD783 specifications, the hold mode offset is very stable over temperature. – ...

Page 7

... FREQUENCY – Hz Figure 4. RMS Noise vs. Input Bandwidth of ADC DRIVING THE ANALOG INPUTS For best performance important to drive the AD783 analog input from a low impedance signal source. This enhances the sampling accuracy by minimizing the analog and digital cross- talk. Signals which come from higher impedance sources (e.g., over will have a relatively higher level of crosstalk ...

Page 8

... AD670 combined with the 150 ns hold- mode settling time of the AD783 result in a total system throughput of 10. keeping the 10.7 MHz IF input to the AD783 at a low amplitude, 255 mV p-p, the resultant distortion and jitter- induced noise result in approximately dynamic range. ...

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