AD9237 Analog Devices, AD9237 Datasheet

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AD9237

Manufacturer Part Number
AD9237
Description
12-Bit, 20/40/65 MSPS 3 V Low Power A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9237

Resolution (bits)
12bit
# Chan
1
Sample Rate
65MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
1 V p-p,2 V p-p,4 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP

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Part Number:
AD9237BCPZ-65
Manufacturer:
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Quantity:
101
FEATURES
Ultralow power
SNR = 66 dBc to Nyquist at 65 MSPS
SFDR = 80 dBc to Nyquist at 65 MSPS
DNL = ±0.7 LSB
Differential input with 500 MHz bandwidth
Flexible analog input: 1 V p-p to 4 V p-p range
Offset binary, twos complement, or gray code data formats
Output enable pin
2-step power-down
Full power-down and sleep mode
Clock duty cycle stabilizer
APPLICATIONS
Ultrasound and medical imaging
Battery-powered instruments
Hand-held scope meters
Low cost digital oscilloscopes
Low power digital still cameras and copiers
Low power communications
GENERAL DESCRIPTION
The AD9237 is a family of monolithic, single 3 V supply, 12-bit,
20 MSPS/40 MSPS/65 MSPS analog-to-digital converters
(ADC). This family features a high performance sample-and-
hold amplifier (SHA) and voltage reference. The AD9237 uses a
multistage differential pipelined architecture with output error
correction logic to provide 12-bit accuracy at 20 MSPS/
40 MSPS/65 MSPS data rates and guarantees no missing codes
over the full operating temperature range.
With significant power savings over previously available ADCs,
the AD9237 is suitable for applications in imaging and medical
ultrasound.
Fabricated on an advanced CMOS process, the AD9237 is
available in a 32-lead LFCSP and is specified over the industrial
temperature range (−40°C to +85°C).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
85 mW at 20 MSPS
135 mW at 40 MSPS
190 mW at 65 MSPS
12-Bit, 20 MSPS/40 MSPS/65 MSPS
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113 © 2005–2010 Analog Devices, Inc. All rights reserved.
MODE2
PRODUCT HIGHLIGHTS
1. Operating at 65 MSPS, the AD9237 consumes a low 190 mW
2. Power scaling reduces the operating power further when
3. The AD9237 operates from a single 3 V power supply and
4. The patented SHA input maintains excellent performance
5. The AD9237 is optimized for selectable and flexible input
6. An output enable pin allows for multiplexing of the outputs.
7. Two-step power-down supports a standby mode in addition
8. The OTR output bit indicates when the signal is beyond the
9. The clock duty cycle stabilizer (DCS) maintains converter
SENSE
REFB
VREF
REFT
3 V Low Power A/D Converter
VIN+
VIN–
at 65 MSPS, 135 mW at 40 MSPS, and 85 mW at 20 MSPS.
running at lower speeds.
features a separate digital output driver supply to
accommodate 2.5 V and 3.3 V logic families.
for input frequencies beyond Nyquist and can be configured
for single-ended or differential operation.
ranges from 1 V p-p to 4 V p-p.
to a power-down mode.
selected input range.
performance over a wide range of clock pulse widths.
SHA
SELECT
REF
FUNCTIONAL BLOCK DIAGRAM
AGND
AVDD
A/D
MDAC1
0.5V
DUTY CYCLE
STABILIZER
AD9237
CLOCK
4
CLK
Figure 1.
CORRECTION LOGIC
OUTPUT BUFFERS
10-STAGE
PIPELINE
PDWN
1 1/2-BIT
15
12
DRVDD
SELECT
MODE
MODE
AD9237
www.analog.com
A/D
DGND
3
OE
OTR
D11
D0

Related parts for AD9237

AD9237 Summary of contents

Page 1

... MSPS, 135 MSPS, and MSPS. 2. Power scaling reduces the operating power further when running at lower speeds. 3. The AD9237 operates from a single 3 V power supply and features a separate digital output driver supply to accommodate 2.5 V and 3.3 V logic families. 4. The patented SHA input maintains excellent performance for input frequencies beyond Nyquist and can be configured for single-ended or differential operation ...

Page 2

... Initial Version   Pin Configuration and Function Descriptions ..............................8   Terminology .......................................................................................9   Equivalent Circuits ......................................................................... 10   Typical Performance Characteristics ........................................... 11   Applying the AD9237 .................................................................... 16   Theory of Operation .................................................................. 16   Analog Input and Reference Overview ................................... 16   Voltage Reference ....................................................................... 18   Clock Input Considerations ...................................................... 19   Power Dissipation, Power Scaling, and Standby Mode ......... 19   ...

Page 3

... Rev Page AD9237 to T MIN AD9237BCP-65 Max Min Typ Max 12 12 ±1.95 ±1.30 ±1.95 ±2.10 ±1.05 ±2.25 ±0.95 −1.00 ±0.70 +1.25 ±1.35 ±0.90 ±2.00 ±2 ±12 ±25 ±5 ±25 0.8 ±2.5 0.1 7 1.35 LSB rms ...

Page 4

... V internal reference AD9237BCP-20 AD9237BCP-40 Min Typ Max Min Typ 66.8 66.5 65.6 66.6 65.3 66.6 66.0 66.3 66.7 66.4 65.1 66.5 64.4 66.4 65.6 65.8 10.8 10.7 Rev Page AD9237BCP-65 Max Min Typ Max Unit 2.0 V 0.8 0.8 V +10 –10 +10 μA +10 –10 +10 μ 3.29 V 3.25 V 0.2 0.2 V 0.05 0.05 V 2.49 V 2.45 V 0.2 0.2 V 0.05 0. MIN MAX AD9237BCP-65 Max ...

Page 5

... Min Typ Max Min Typ 50.0 25.0 15.0 8.8 15.0 8.8 3.5 3 1.0 1.0 0.5 0.5 3.0 3.0 3.0 3 Rev Page AD9237 AD9237BCP-65 Typ Max Min Typ Max 83.5 85.5 82.4 69.4 80.1 77.9 74.9 −83.5 −85.5 −82.4 −69.4 −80.1 −77.9 −74.9 −90 −90 −90 −72.0 −90 −90 −90 AD9237BCP-65 Max Min Typ Max Unit 65 MSPS ...

Page 6

... AD9237 TIMING DIAGRAM N–1 ANALOG INPUT CLK DATA N–11 OUT N+1 N N+2 N N+4 N+5 N–10 N–9 N–8 N–7 N–6 N–5 Figure 2. Timing Diagram Rev Page N+8 N+7 N+6 N–4 N–3 N–2 N– ...

Page 7

... Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for AVDD + 0 extended period may affect device reliability. AVDD + 0.3 V ESD CAUTION AVDD + 0.3 V AVDD + 0.3 V AVDD + 0.3 V +85 °C 150 °C 300 °C +150 °C = 32.5°C/W, θ = 32.71°C/ Rev Page AD9237 ...

Page 8

... AGND 29 VIN+ 30 VIN− EP MODE2 1 24 VREF PIN 1 CLK 2 23 SENSE INDICATOR MODE PDWN 4 AD9237 21 OTR D11 (MSB) TOP VIEW DNC 6 19 D10 (Not to Scale) D0 (LSB NOTES 1. DNC = DO NOT CONNECT RECOMMENDED THAT THE EXPOSED PADDLE BE SOLDERED TO THE GROUND PLANE ...

Page 9

... AC specifications may be reported in dBc (degrades as signal levels are lowered dBFS (always related back to converter full scale). Rev Page AD9237 ...

Page 10

... AD9237 EQUIVALENT CIRCUITS AVDD VIN+, VIN– Figure 4. Equivalent Analog Input Circuit MODE, 375Ω MODE2, GC, OE 70kΩ Figure 5. Equivalent MODE, MODE2, GC, OE Input Circuit DRVDD Figure 6. Equivalent Digital Output Circuit 375Ω CLK, PDWN Figure 7. Equivalent CLK, PDWN Input Circuit Rev Page D11– ...

Page 11

... Figure 11. AD9237-20 SNR/SFDR vs. Clock Frequency with Figure 12. AD9237-40 SNR/SFDR vs. Clock Frequency with f SNR = 66.0dBc SFDR = 78.6dBc 32.5 Figure 13. AD9237-65 SNR/SFDR vs. Clock Frequency with f Rev Page –0.5 dBFS SFDR SNR 65 60 10.0 12.5 15.0 17.5 CLOCK FREQUENCY (MSPS) ...

Page 12

... INPUT AMPLITUDE (dBFS) Figure 16. AD9237-40 SNR/SFDR vs. Input Amplitude with 32.5 –10 – MHz Figure 18. AD9237-65 SNR/SFDR vs. Input Amplitude with f IN SFDR dBc 1V p-p –10 – MHz Figure 19. AD9237-20 SNR/SFDR vs. Input Amplitude with f IN Rev Page ...

Page 13

... Figure 23. AD9237-65 Two-Tone SNR/SFDR , vs. Analog Input with IN2 100 90 SFDR dBFS 80 SNR dBFS 70 60 SFDR dBc 50 40 SNR dBc –30 Figure 24. AD9237-40 Two-Tone SNR/SFDR , vs. Analog Input with 100 90 SFDR dBFS 80 SNR dBFS 70 60 SFDR dBc 50 40 SNR dBc – MHz Figure 25 ...

Page 14

... Rev Page 100 90 SFDR dBFS 80 SNR dBFS 70 60 SFDR dBc 50 40 SNR dBc 30 –30 –25 –20 –15 INPUT AMPLITUDE (AIN) Figure 29. AD9237-40 Two-Tone SNR/SFDR vs. Analog Input with MHz MHz IN1 IN2 90 85 SFDR SNR ...

Page 15

... AD9237-20 AD9237-40 66.5 AD9237-65 66.0 65.5 65 CLOCK FREQUENCY (MSPS) Figure 32. AD9237 SINAD/ENOB vs. Clock Frequency with 10.83 80 10.75 75 10.67 70 10.59 65 10.50 60 – Nyquist Figure 33. AD9237-65 SNR/SFDR vs. Temperature with f IN Rev Page AD9237 SNR SFDR – TEMPERATURE (°C) = 32.5MHz IN 85 ...

Page 16

... SHA to acquire the wrong input value and should be minimized. ANALOG INPUT AND REFERENCE OVERVIEW The analog input to the AD9237 is a differential switched capacitor SHA that has been designed for optimum performance while processing a differential input signal. The SHA input can support a wide common-mode range and maintain excellent performance, as shown in Figure 34 ...

Page 17

... For example p-p signal can be applied to VIN+ while reference is applied to VIN–. The AD9237 then accepts an input signal varying between 2 V and the single-ended configuration, distortion performance may degrade significantly as compared to the differential case. ...

Page 18

... AGND to 0.2 V VOLTAGE REFERENCE A stable and accurate 0.5 V voltage reference is built into the AD9237. The input range can be adjusted by varying the reference voltage applied to the AD9237, using either the internal reference or an externally applied reference voltage. The input span of the ADC tracks reference voltage changes linearly ...

Page 19

... The lowest typical conversion rate of the AD9237 is 1 MSPS. At clock rates below 1 MSPS, dynamic performance may degrade. POWER DISSIPATION, POWER SCALING, AND 0.5V ERROR (%) ...

Page 20

... PDWN Voltage AVDD 1/3 AVDD AGND (Default) By asserting the PDWN pin high, the AD9237 is placed in power-down mode. In this state, the ADC typically dissipates 1 mW. During power-down, the output drivers are placed in a high impedance state. Low power dissipation in power-down mode is achieved by shutting down the reference, reference buffer, biasing networks, clock, and duty cycle stabilizer circuitry ...

Page 21

... By asserting the PDWN pin to AVDD/3, the AD9237 is placed in standby mode. In this state, the ADC typically dissipates 20 mW. The output drivers are placed in a high impedance state. The reference circuitry is enabled, allowing for a quick start upon bringing the ADC into normal operating mode. ...

Page 22

... ORDERING GUIDE 1, Model Temperature Range AD9237BCPZ-20 –40°C to +85°C AD9237BCPZRL7-20 –40°C to +85°C AD9237BCPZ-40 –40°C to +85°C AD9237BCPZRL7-40 –40°C to +85°C AD9237BCPZ-65 –40°C to +85°C AD9237BCPZRL7-65 –40°C to +85° RoHS-Compliant Part. 5.00 BSC SQ 0.60 MAX 24 0.50 BSC TOP 4 ...

Page 23

... NOTES Rev Page AD9237 ...

Page 24

... AD9237 NOTES © 2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05455–0–5/10(A) Rev Page ...

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