ADR395 AD [Analog Devices], ADR395 Datasheet
ADR395
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ADR395 Summary of contents
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Preliminary Technical Data FEATURES Complete dual, 16-bit digital-to-analog converters (DACs) Programmable output range: ±10 V, ±10.2564 V, or ±10.5263 V ±1 LSB max INL error, ±1 LSB max DNL error Low noise: 60 nV/√Hz Settling time: 10 µs max Integrated ...
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AD5762R TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications..................................................................................... 4 AC Performance Characteristic...................................................... 6 Timing Characteristics..................................................................... 7 Absolute Maximum Ratings.......................................................... 10 ESD Caution................................................................................ 10 Pin Configuration ...
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Preliminary Technical Data FUNCTIONAL BLOCK DIAGRAM PGND AD5762R DGND 16 SDIN INPUT SHIFT SCLK REGISTER AND SYNC CONTROL LOGIC SDO D0 D1 BIN/2SCOMP AV REFGND REFOUT DD SS +5V REFERENCE 16 INPUT DAC ...
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AD5762R SPECIFICATIONS −11 −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA, REFB = 5 V external 2 5.25 ...
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Preliminary Technical Data Parameter 3 DIGITAL INPUTS V , Input High Voltage Input Low Voltage IL Input Current Pin Capacitance 3 DIGITAL OUTPUTS (D0, D1, SDO) Output Low Voltage Output High Voltage Output Low Voltage Output High ...
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AD5762R AC PERFORMANCE CHARACTERISTIC −11 −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA, REFB external 2 ...
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Preliminary Technical Data TIMING CHARACTERISTICS −11 −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA, REFB external 2.7 V ...
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AD5762R SCLK SYNC t 7 SDIN DB23 LDAC VOUT LDAC = 0 VOUT CLR VOUT SCLK SYNC t 7 DB23 SDIN INPUT WORD FOR DAC N SDO LDAC ...
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Preliminary Technical Data SCLK SYNC DB23 SDIN SDO 24 DB0 DB23 INPUT WORD SPECIFIES REGISTER TO BE READ DB23 UNDEFINED Figure 4. Readback Timing Diagram 200µ OUTPUT PIN C L 50pF 200µ Figure 5. Load ...
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AD5762R ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 4. Parameter AV to AGND, DGND AGND, DGND DGND CC ...
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Preliminary Technical Data PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 SYNC Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is transferred in ...
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AD5762R Pin No. Mnemonic Description 19 VOUTB Analog Output Voltage of DAC B. Buffered output with a nominal full-scale output range of ±10 V. The output amplifier is capable of directly driving a 10 kΩ, 200 pF load. 20 AGNDB ...
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Preliminary Technical Data TERMINOLOGY Relative Accuracy or Integral nonlinearity (INL) For the DAC, relative accuracy or integral nonlinearity (INL measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer ...
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AD5762R Channel-to-Channel Isolation Channel-to-channel isolation is the ratio of the amplitude of the signal at the output of one DAC to a sine wave on the reference input of another DAC measured in dB. Reference TC Reference TC ...
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Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 10000 20000 30000 40000 DAC CODE Figure 7. Integral Nonlinearity Error vs. Code ± 1.0 T ...
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AD5762R 0.15 0.10 0.05 0 –0.05 –0.10 –0. 25°C A –0. ±15V DD SS REFIN = 5V –0.25 –40 – TEMPERATURE (°C) Figure 13. Differential Nonlinearity Error vs. Temperature ...
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Preliminary Technical Data 0.8 REFIN = 0.6 0.4 0.2 0 –0.2 –0.4 –40 – TEMPERATURE (°C) Figure 19. Total Unadjusted Error vs. Reference Voltage ±16 ...
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AD5762R 7000 T = 25°C A REFIN = 5V 6000 RI = 6kΩ SCC 5000 4000 3000 2000 1000 0 –1000 –10 –5 0 SOURCE/SINK CURRENT (mA) Figure 25. Source and Sink Capability of Output Amplifier with Positive Full Scale ...
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Preliminary Technical Data (kΩ) SCC Figure 31. Short-Circuit Current vs CH1 10.0V CH2 10.0V M400µ CH3 ...
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AD5762R Figure 37. TEMP Voltage vs. Temperature Preliminary Technical Data Rev. PrA | Page ...
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Preliminary Technical Data THEORY OF OPERATION The AD5762R is a dual, 16-bit, serial input, bipolar voltage output DAC and operates from supply voltages of ±11 ±16.5 V and has a buffered output voltage ±10.5263 V. ...
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AD5762R 68HC11* MOSI SCK PC7 PC6 MISO *ADDITIONAL PINS OMITTED FOR CLARITY Figure 39. Daisy Chaining the AD5762R Daisy-Chain Operation For systems that contain several devices, the SDO pin can be used to daisy chain several devices together. This daisy-chain ...
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Preliminary Technical Data OUTPUT I/V AMPLIFIER V 16-BIT REFIN DAC DAC LDAC REGISTER INPUT REGISTER SCLK INTERFACE SYNC LOGIC SDIN Figure 40. Simplified Serial Interface of Input Loading Circuitry for One DAC Channel TRANSFER FUNCTION Table 6 shows the ideal ...
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AD5762R Table 7. AD5762R Input Register Format MSB DB23 DB22 DB21 DB20 DB19 DB18 DB17 REG2 REG1 REG0 A2 A1 Table 8. Input Register Bit Functions Register Function R/W Indicates a read from or a write to ...
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Preliminary Technical Data DATA REGISTER The data register is addressed by setting the three REG bits to 010. The DAC address bits select with which DAC channel the data transfer is to take place (see Table 8). The data bits ...
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AD5762R Table 17. AD5762R Offset Register options Offset Adjustment +15.875 LSBs +15.75 LSBs No Adjustment (default) −15.875 LSBs −16 LSBs OF7 OF6 OF5 OF4 ...
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Preliminary Technical Data OFFSET AND GAIN ADJUSTMENT WORKED EXAMPLE Using the information provided in the previous section, the following worked example demonstrates how the AD5762R functions can be used to eliminate both offset and gain errors. As the AD5762R is ...
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AD5762R AD5762R FEATURES ANALOG OUTPUT CONTROL In many industrial process control applications vital that the output voltage be controlled during power-up and during brownout conditions. When the supply voltages are changing, the VOUT pins are clamped to 0 ...
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... Part No. Initial Accuracy(mV Max) ADR435 ±6 ADR425 ±6 ADR02 ±5 ADR395 ±6 AD586 ±2.5 Precision Voltage Reference Selection To achieve the optimum performance from the AD5762R over its full operating temperature range, an external voltage reference must be used. Thought should be given to the selection of a precision voltage reference. The voltage applied to the reference input is used to provide a buffered positive and negative reference for the DAC cores ...
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AD5762R LAYOUT GUIDELINES In any circuit where accuracy is important, careful consider- ation of the power supply and ground return layout helps to ensure the rated performance. The printed circuit board on which the AD5762R is mounted should be designed ...
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Preliminary Technical Data When data is being transmitted to the AD5762R, the SYNC line (PC7) is taken low and data is transmitted MSB first. Data appearing on the MOSI output is valid on the falling edge of SCK. Eight falling ...
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AD5762R PIC16C6x/7x 1 SDI/RC4 SDO/RC5 SCLK/RC3 RA1 1 ADDITIONAL PINS OMITTED FOR CLARITY Figure 47. AD5762R to PIC16C6x/7x Interface AD5762R 1 EVALUATION BOARD The AD5762R performance can be evaluated via the AD5764R SDO evaluation board. SDIN The AD5764R comes with ...
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Preliminary Technical Data OUTLINE DIMENSIONS 1.05 1.00 0.95 0.15 0.05 VIEW A ROTATED 90° CCW 1 ORDERING GUIDE Model Function AD5762RCSUZ Dual 16-bit DAC AD5762RCSUZ-REEL7 Dual 16-bit DAC ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are ...