BU2090 Rohm Semiconductor, BU2090 Datasheet
BU2090
Specifications of BU2090
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BU2090 Summary of contents
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... The BU2090, BU2090F, BU2090FS, BU2092, BU2092F, and BU2092FV are 12-bit serial input, parallel output drivers. For the BU2090 / F / FS, data input is shifted to the 12-bit internal shift register on the rising edge of a clock pulse. On the falling edge of the pulse, if the DATA pin is HIGH, the data in the shift register is output in parallel Q11 ...
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... Standard ICs • Absolute maximum ratings (Ta = 25°C) (BU2090 / F / FS, BU2092 / F / FV) Parameter Symbol Power supply voltage BU2090 / Power dissipation BU2092 / BU2090 / Power dissipation BU2092 / Operating temperature Storage temperature Input voltage Output voltage 1 Unmounted 2 When mounted on a glass epoxy board of 50mm ...
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... Standard ICs • Block diagram BU2090 / Control circuit SS DATA 2 12-bit shift register CLOCK 3 Latch Q0 4 Output buffer (open drain BU2090 / BU2090F / BU2090FS / BU2092 / DATA 2 15 Q11 CLOCK 3 Q10 14 12-bit storage register 1 LCK BU2092FV DATA 2 CLOCK 3 LCK BU2092 / BU2092F / BU2092FV 18 V Control circuit ...
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... Parallel data output 12 N.C. Not connected 13 N.C. Not connected 14 Q7 Parallel data output 15 Q8 Parallel data output 16 Q9 Parallel data output 17 Q10 Parallel data output 18 Q11 Parallel data output 19 OE Output Enable 20 V Power supply DD BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV ...
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... Output low level voltage V I "H" output disable current OZH "L" output disable current I OZL Current dissipation I DD BU2090 / switching characteristics (unless otherwise noted 25°C, V Parameter Symbol Minimum clock pulse width t W Data shift setup time t SU Data shift hold time t ...
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... W W 90% 90% 90% 10% 10 (LCK) W 90% 90% 50% 10% t (LCK) PZL 50% 50% t PLZ 50% 10% 10% Fig.2 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV = 0V) SS Unit V Conditions 10pF 10pF 10pF 10pF — ...
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... Contents of shift register are stored in storage register. No change in shift register Q11 output for the BU2090 / and BU2092 / Nch open drain output. When the shift register transfer data is LOW, the corresponding output FET is ON (continuous state). When the transfer data is HIGH, the output FET is OFF (discontinuous). ...
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... The logic of the DATA pin is sent to the 12-bit shift register on the rising edge of the CLOCK pulse. Subsequently shifted from Q0 to Q11 for every clock rising edge. For the BU2090 / When the DATA pin is LOW on the CLOCK falling edge, the data does not change its output state only shifted in the internal shift register ...
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... Q0 to Q11. When OE is HIGH, regardless of the content of the storage register, the output FET turns OFF and enters a HIGH (discontinuous) state. CLOCK DATA D11 D10 D9 D8 LCK OE Q11 Q10 Note 1) Note 2) Pull-up resistance is connected to the output pin. Fig.4 Operation timing chart BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV indicates unstable output. 9 ...
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... Standard ICs • Application example BU2090 / CLOCK DATA GND ( Control circuit BU2092 / F / (FV) GND (V ) DATA SS CLOCK Control circuit LCK 10 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV V DD GND ( Fig GND ( Fig.6 LED power supply LED power supply ...
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... SOP16 (Unmounted) 200 100 125 AMBIENT TEMPERATURE Fig.7 BU2090 / thermal derating characteristics 1200 DIP18 (Unmounted) 1000 800 SSOP-B20 (When mounted on a 70mm 70mm 1.6mm glass epoxy board) 600 SOP18 (when mounted on a 50mm 50mm 1.6mm glass epoxy board) ...
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... SOP16 BU2090FS 6.6 0 0.8 0.36 0.1 SSOP-A16 12 BU2092 7. BU2092F 0.15 BU2092FV 0.3Min. 0.15 BU2090 / BU2090F / BU2090FS / BU2092 / BU2092F / BU2092FV 22 2.54 0.5 0.1 DIP18 11.2 0 1.27 0.4 0.1 0.3Min. 0.15 SOP18 6.5 6.5 0.2 0.2 ...
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Appendix No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product ...