clc532 National Semiconductor Corporation, clc532 Datasheet

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clc532

Manufacturer Part Number
clc532
Description
High-speed 2 1 Analog Multiplexer
Manufacturer
National Semiconductor Corporation
Datasheet

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© 2001 National Semiconductor Corporation
CLC532
High Speed 2:1 Analog Multiplexer
General Description
The CLC532 is a high speed 2:1 multiplexer with active input
and output stages. The CLC532 innovative design employs
a closed loop design which dramatically improves accuracy.
This monolithic device is constructed using an advanced
high performance bipolar process.
The CLC532 has been specifically designed to provide set-
tling times of 17ns to 0.01%. Fast settling time, coupled with
the adjustable bandwidth, and channel-to-channel isolation
is better than 80dB
the CLC532 an ideal choice for infrared and CCD imaging
systems and spurious signal levels make the CLC532 a very
suitable choice for both I/Q processors and receivers.
The CLC532 is offered in two industrial versions,
CLC532AJP\AJE, specified from −40˚C to +85˚C and pack-
aged in 14-pin plastic DIP14-pin and SOIC packages.
Features
n 17ns 12-bit settling time to .01%
n Low noise – 32µVrms
n High isolation – 80dB
n Low distortion – 80dBc
Typical Application
Ordering Information
Package
14-Pin Plastic DIP
14-Pin Plastic SOIC
Enhanced Solutions (Military/Aerospace)
SMD Number: 5962-92035
*
*
Space level versions also available.
For more information, visit http://www.national.com/mil
@
10MHz. Low distortion (−80dBc) makes
Temperature Range
Industrial
−40˚C to +85˚C
−40˚C to +85˚C
@
@
10MHz
5MHz
DS012716
DS012716-2
Part Number
CLC532AJP
CLC532AJE
n Adjustable bandwidth–190MHz(max)
Applications
n Infrared system multiplexing
n CCD sensor signals
n Radar I/Q switching
n High definition video HDTV
n Test and calibration
Connection Diagram
Package Marking
CLC532AJP
CLC532AJE
Settling Time vs. R
DIP & SOIC
Pinout
DS012716-4
NSC Drawing
N14E
M14A
L
DS012716-24
December 2001
www.national.com

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clc532 Summary of contents

Page 1

... CLC532 High Speed 2:1 Analog Multiplexer General Description The CLC532 is a high speed 2:1 multiplexer with active input and output stages. The CLC532 innovative design employs a closed loop design which dramatically improves accuracy. This monolithic device is constructed using an advanced high performance bipolar process. ...

Page 2

... COMP Thermal Resistance ( Infinite MDIP −40˚C to +85˚C SOIC −65˚C to +150˚C Thermal Resistance ( 10 sec < MDIP 500V SOIC = 500 ; C = 10pF; ECL Mode, pin 6 = NC) L COMP Conditions Typ CLC532AJP/AJE +25˚C < V 0.1V 190 OUT OUT PP < V 0.1V OUT PP 0.1MHz to 200MHz ...

Page 3

... Note 2: Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Note 3: The CLC532 does not require external C Note 4: Absolute maximum ratings are limiting values applied individually, and beyond which the serviceability of the circuit maybe impaired. functional operability under any of these conditions is not necessarily implied. Exposure to maximum ratings for extended periods may affect device reliability. Note 5: AJ: 100% tested at +25˚ ...

Page 4

Typical Performance Characteristics Small Signal/Phase vs. Load Small Signal Gain/Phase vs. Load with Recommended C COMP SFRD vs. Input Frequency www.national.com (+25˚C unless otherwise specified) Recommended compensation Capacitance vs. Load DS012716-5 Large Signal Frequency Response vs. Load DS012716-7 Output Impedance ...

Page 5

Typical Performance Characteristics Channel to Channel Crosstalk Input Impedance Large Signal Pulse Response vs. C comp (+25˚C unless otherwise specified) (Continued) Digitized Pulse Response DS012716-11 Small Signal Pulse Response DS012716-13 Large Signal Pulse Response vs. R DS012716-15 5 DS012716-12 DS012716-14 ...

Page 6

Typical Performance Characteristics Settling Time vs C comp 2nd and 3rd Harmonic Distortion 3rd Harmonic Distortion vs. V OUT www.national.com (+25˚C unless otherwise specified) (Continued) Settling Time vs. R DS012716-17 2nd Harmonic Distortion vs. V DS012716- 100 ...

Page 7

Typical Performance Characteristics 2nd Harmonic Distortion vs OUT Differential Phase vs. Frequency (Negative Sync) 2- Tone, 3rd Order Intermodulation Intercept (+25˚C unless otherwise specified) (Continued) = 500 3nd Harmonic Distortion vs DS012716-22 Differintial Gain vs. ...

Page 8

Typical Performance Characteristics Equivalent Input Noise Switching Transient (Grounded Inputs) Typical DS Error vs. Temperature www.national.com (+25˚C unless otherwise specified) (Continued) Integral Linearity Error DS012716-29 Large signal Channel-to-Channel Switching DS012716-31 DS012716-33 8 DS012716-30 DS012716-32 ...

Page 9

... R IN DGND CHANNEL SELECT -5. 2V FIGURE 1. Standard CLC532 Circuit Configuration Digital Interface and Channel SELECT The CLC532 functions with ECL, TTL and CMOS logic fami- lies, D SETTLING ERROR REF D is left floating, and the channel SELECT responds to WINDOW REF ECL level signals, Figure 2 . For TTL or CMOS level SELECT ...

Page 10

... CLC532’s operation. 0.1µF to .1µF ceramic chip ca- pacitor should be located very close to the individual power supply pins. Larger +6.8µF tantalum capacitors should be used within a few inches of the CLC532. The ground con- nections for these larger by-pass capacitors should be sym- metrically located relative the CLC532 output load ground connection ...

Page 11

... Application Information Combining Two Signals in ADC Applications The CLC532 is applicable in a wide range of circuits and applications. A classic example of this flexibility is combining two or more signals for digitization by an analog-to-digital converter (ADC). A clear understanding of both the multi- plexer and the ADC’S operation is needed to optimize this configuration ...

Page 12

... F Zero Crossing -2V FIGURE 9. Low Distortion Full Wave Rectifier the CLC532 circuit shown in Figure 11 . The CLC532 based circuit uses a digital LO making system design easier in those cases where the LO is digitally derived. Another ad- vantage of the CLC532 based approach is excellent isolation between all three ports. (See the RF design awards article by Thomas Hack in January 1993 of RF Design.) > ...

Page 13

... Application Information FIGURE 11. High-Isolation Mixer Implementation Evaluation Board An evaluation board (part number 730028) for CLC532 is available. This board can be used for fast, trouble-free, (Continued) FIGURE 10. Typical Double-Balanced Mixer evaluation and characterization of the CLC532. Additionally, this board serves as a template for layout and fabrication information ...

Page 14

Physical Dimensions www.national.com inches (millimeters) unless otherwise noted NS Package Number M14A NS Package Number N14A 14 ...

Page 15

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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