ICS85214AG IDT, Integrated Device Technology Inc, ICS85214AG Datasheet

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ICS85214AG

Manufacturer Part Number
ICS85214AG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS85214AG

Number Of Clock Inputs
2
Output Frequency
700MHz
Output Logic Level
HSTL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS85214AGILF
Manufacturer:
Freescale
Quantity:
89
Part Number:
ICS85214AGLF
Manufacturer:
IDT
Quantity:
97
LOW SKEW, 1-TO-5, DIFFERENTIAL-TO-
HSTL FANOUT BUFFER
General Description
input levels. The single ended CLK1 input accepts LVCMOS or
LVTTL input levels. Guaranteed output and part-to-part skew
characteristics make the ICS85214 ideal for those clock distri-
bution applications demanding well defined performance and
repeatability.
Block Diagram
IDT™ / ICS™ HSTL FANOUT BUFFER
CLK_SEL
HiPerClockS™
CLK_EN
ICS
CLK0
CLK0
CLK1
Pulldown
Pullup
Pulldown
Pulldown
Pulldown
The ICS85214 is a low skew, high performance
1-to-5 Differential-to-HSTL Fanout Buffer and a
member of the HiPerClockS™ family of High
Performance Clock Solutions from IDT. The CLK0,
CLK0 pair can accept most standard differential
0
1
0
1
D
LE
Q
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
1
Features
Five differential HSTL compatible outputs
Selectable differential CLK0, CLK0 or LVCMOS/LVTTL clock
inputs
CLK0, CLK0 pair can accept the following differential input
levels: LVPECL, LVDS, HSTL, HCSL, SSTL
CLK1 can accept the following input levels: LVCMOS or LVTTL
Output frequency up to: 700MHz
Translates any single-ended input signal to HSTL levels with
resistor bias on CLK0 input
Output skew: 30ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.8ns (maximum)
3.3V core, 1.8V output operating supply
0°C to 85°C ambient operating temperature
Industrial temperature information available upon request
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Pin Assignment
6.5mm x 4.4mm x 0.925mm
20-Lead TSSOP
Q4
Q4
package body
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
G Package
ICS85214
Top View
ICS85214AG REV. B FEBRUARY 25, 2008
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CLK_EN
V
nc
CLK1
CLK0
CLK0
CLK_SEL
GND
DDO
DD
ICS85214

Related parts for ICS85214AG

ICS85214AG Summary of contents

Page 1

... Industrial temperature information available upon request • Available in both standard (RoHS 5) and lead-free (RoHS 6) packages Pin Assignment 6.5mm x 4.4mm x 0.925mm ICS85214 DDO 2 19 CLK_EN CLK1 CLK0 CLK0 CLK_SEL GND ICS85214 20-Lead TSSOP package body G Package Top View ICS85214AG REV. B FEBRUARY 25, 2008 ...

Page 2

... Positive supply pin. Synchronizing clock enable. When LOW, clock outputs follow clock input. Pulldown When HIGH, Qx outputs are forced low, Qx outputs are forced high. LVTTL/LVCMOS interface levels. Output supply pin. Test Conditions 2 Minimum Typical Maximum ICS85214AG REV. B FEBRUARY 25, 2008 Units pF Ω k Ω k ...

Page 3

... Q[0:4] Q[0:4] LOW HIGH HIGH LOW LOW HIGH HIGH LOW HIGH LOW LOW HIGH 3 Enabled Input to Output Mode Differential to Differential Non-Inverting Differential to Differential Non-Inverting Single-Ended to Differential Non-Inverting Single-Ended to Differential Non-Inverting Single-Ended to Differential Single-Ended to Differential ICS85214AG REV. B FEBRUARY 25, 2008 Polarity Inverting Inverting ...

Page 4

... A Minimum Typical Maximum 0.3 DD -0.3 0.8 150 -5 = 0°C to 85°C A Minimum Typical Maximum 5 150 -150 -5 0.15 1.3 0.5 V – 0.85 DD ICS85214AG REV. B FEBRUARY 25, 2008 Units Units V V µA µA Units µA µA µA µ ...

Page 5

... V = 1.8V ±0.2V, T DDO Test Conditions ƒ ≤ 700MHz 20 0°C to 85°C A Typical Maximum 1 – 1.1 = 0°C to 85°C A Minimum Typical Maximum 1.0 200 46 45 ICS85214AG REV. B FEBRUARY 25, 2008 Units Units 700 MHz 300 MHz 1 250 ps 700 ...

Page 6

... Propagation Delay IDT™ / ICS™ HSTL FANOUT BUFFER V DD SCOPE Qx CLK0 CLK0 nQx GND Differential Input Level Par Par Part-to-Part Skew Q0:Q4 Q0:Q4 Output Duty Cycle/Pulse Width/Period Cross Points PP tsk(pp PERIOD t PW odc = x 100% t PERIOD ICS85214AG REV. B FEBRUARY 25, 2008 CMR ...

Page 7

... For example, if the input clock swing is only 2.5V and V = 3.3V, V_REF should be 1.25V and DD R2/R1 = 0.609. IDT™ / ICS™ HSTL FANOUT BUFFER 80 20 Figure 2. Single-Ended Signal Driving Differential Input CLK_IN CLKx V_REF nCLKx C1 R2 0.1uF 1K ICS85214AG REV. B FEBRUARY 25, 2008 ...

Page 8

... Zo = 50Ω 50Ω LVDS Driven by a 3.3V LVDS Driver 2. 120 120 Zo = 60Ω 60Ω SSTL R1 R2 120 120 Driven by a 2.5V SSTL Driver ICS85214AG REV. B FEBRUARY 25, 2008 3.3V CLK nCLK HiPerClockS Input 3.3V CLK R1 100 nCLK Receiver 3.3V CLK nCLK HiPerClockS ...

Page 9

... Both sides of the differential output pair should either be left floating or terminated. power pin. For ICS85214, the unused clock outputs can be left floating GND nQ4 12 9 CLK_SEL nQ3 14 7 nCLK CLK nQ2 16 5 SCLK nQ1 3. VDD nCLK_EN nQ0 1. VDDO Q0 0.1u C1 0.1u ICS85214 R11 ICS85214AG REV. B FEBRUARY 25, 2008 ...

Page 10

... IDT™ / ICS™ HSTL FANOUT BUFFER = 3. 3.465V, which gives worst case results 3.465V * 850mA = 227.2mW DD_MAX * Pd_total + θ by Velocity JA 0 114.5°C/W 73.2°C/W 10 must be used. Assuming a moderate JA 200 500 98.0°C/W 88.0°C/W 66.6°C/W 63.5°C/W ICS85214AG REV. B FEBRUARY 25, 2008 ...

Page 11

... V OH_MAX DDO_MAX L Pd_L = ( OL_MAX DDO_MAX L Pd_H = (1.0V/50Ω) * (2V - 1.0V) = 20mW Pd_L = (0.4V/50Ω) * (2V - 0.4V) = 12.8mW Total Power Dissipation per output pair = Pd_H + Pd_L = 32.8mW IDT™ / ICS™ HSTL FANOUT BUFFER V OUT RL 50Ω ) OH_MAX ) OL_MAX 11 ICS85214AG REV. B FEBRUARY 25, 2008 ...

Page 12

... Symbol Minimum 0.05 A2 0.80 b 0.19 c 0.09 D 6.40 E 6.40 Basic E1 4.30 e 0.65 Basic L 0.45 α 0° aaa Reference Document: JEDEC Publication 95, MO-153 12 500 88.0°C/W 63.5°C/W Maximum 1.20 0.15 1.05 0.30 0.20 6.60 4.50 0.75 8° 0.10 ICS85214AG REV. B FEBRUARY 25, 2008 ...

Page 13

... Shipping Packaging 20 Lead TSSOP 20 Lead TSSOP “Lead-Free” 20 Lead TSSOP “Lead-Free” 20 Lead TSSOP 13 Temperature Tube 0°C to 85°C 2500 Tape & Reel 0°C to 85°C Tube 0°C to 85°C 2500 Tape & Reel 0°C to 85°C ICS85214AG REV. B FEBRUARY 25, 2008 ...

Page 14

... Changed format throughout the datasheet. T3B 3 Clock Input Function Table - corrected CLK0 column from 0 (1st row and 1 (2nd row Updated Differential Clock Input Interface section. IDT™ / ICS™ HSTL FANOUT BUFFER 4pF max. to 4pF typical IN 14 ICS85214AG REV. B FEBRUARY 25, 2008 Date 7/17/03 3/13/07 2/25/08 ...

Page 15

ICS85214 LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States ...

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