IDT72V2113 Integrated Device Technology, IDT72V2113 Datasheet
IDT72V2113
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IDT72V2113 Summary of contents
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... FEATURES: • Choose among the following memory organizations: IDT72V2103 ⎯ ⎯ ⎯ ⎯ ⎯ 131,072 x 18/262,144 x 9 IDT72V2113 ⎯ 262,144 x 18/524,288 x 9 • • • • • Functionally compatible with the IDT72V255LA/72V265LA and IDT72V275/72V285 SuperSync FIFOs • • • • • ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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... Supply Voltage (Com'l & Ind'l) 0 Input High Voltage (Com'l & Ind'l) 2.0 Input Low Voltage (Com'l & Ind'l) — Operating Temperature Commercial 0 Operating Temperature Industrial -40 = -40°C to +85°C; JEDEC JESD8-A compliant) A IDT72V2103L IDT72V2113L (1) Commercial and Industrial 7-5, 10 CLK Min. Max. –1 1 –10 10 2.4 — ...
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... A OE OHZ 9 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Com’l & Ind’l (2) Commercial TQFP Only TQFP Only IDT72V2103L10 IDT72V2103L15 IDT72V2113L10 IDT72V2113L15 Min. Max. Min. Max. Unit — 100 — 66.7 MHz (5) ( — 15 — ...
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... ASYNCHRONOUS TIMING (1) = 3.3V ± 0.15V -40°C to +85°C; JEDEC JESD8-A compliant IDT72V2103L6 IDT72V2113L6 Min. 0.6 4.5 4.5 10 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES Commercial Com’l & Ind’l IDT72V2103L7-5 IDT72V2113L7-5 Max. Min. Max. Unit — 100 — 83 MHz 8 0 — 12 — ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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... IDT72V2113. If both x9 Input and x9 Output bus Widths are selected, (D the 131,074th word for the IDT72V2103 and 262,146th word for the IDT72V2113. Continuing to write data into the FIFO will cause the PAF to go LOW. Again reads are performed, the PAF will go LOW after (D-m) writes to the FIFO ...
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... In addition to loading offset values into the FIFO also possible to read the current offset values. Offset values can be read via the parallel output port Q0-Qn, regardless of the programming mode selected (serial or parallel not possible to read the offset values in serial fashion. TABLE 2 — DEFAULT PROGRAMMABLE FLAG OFFSETS IDT72V2103, IDT72V2113 LD FSEL0 ...
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... IDT72V2113 IDT72V2113 (n+1) to 131,072 (n+1) to 262,144 131,073 to (262,144-(m+1)) 262,145 to (524,288-(m+1)) (262,144-m) to 262,143 (524,288-m) to 524,287 262,144 524,288 IDT72V2103 IDT72V2113 IDT72V2113 n n+1 (n+2) to 131,073 (n+2) to 262,145 262,146 to (524,289-(m+1)) 131,074 to (262,145-(m+1)) (524,289-m) to 524,288 (262,145-m) to 262,144 262,145 524,289 14 COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES ...
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... IDT72V2113 Note: All unused bits of the LSB & MSB are don’t care All Other Modes # of Bits Used: 17 bits for the IDT72V2103 18 bits for the IDT72V2113 Note: All unused bits of the LSB & MSB are don’t care Non-Interspersed Parity Interspersed ...
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... Empty Offset (MSB) Full Offset (LSB) Full Offset (MSB Mode Serial shift into registers bits for the IDT72V2103 38 bits for the IDT72V2113 1 bit for each rising WCLK edge Starting with Empty Offset (LSB) Ending with Full Offset (MSB ...
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... WCLK rising edge, starting with the Empty Offset LSB and ending with the Full Offset MSB mode is selected, a total of 36 bits for the IDT72V2103 and 38 bits for the IDT72V2113. For any other mode of operation (that includes x18 bus width on either the Input or Output), minus 2 bits from the values above ...
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... IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113. In FWFT mode, if x18 Input or x18 Output bus Width is selected 131,073 for the IDT72V2103 and 262,145 for the IDT72V2113. ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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... In FWFT mode, if x18 Input or x18 Output bus Width is selected, the PAF will go LOW after (131,073-m) writes for the IDT72V2103 and (262,145-m) writes for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected, the PAF will go LOW after (262,145-m) writes for the IDT72V2103 and (524,289-m) writes for the IDT72V2113 ...
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... HF will go LOW after (D writes to the FIFO. If x18 Input or x18 Output bus Width is selected 131,072 for the IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113. In FWFT mode reads are performed after reset (MRS or PRS), HF will go LOW after (D-1 writes to the FIFO ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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... If x18 Input or x18 Output bus Width is selected 131,072 for the IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113. 5. There must be at least two words written to and two words read from the FIFO before a Retransmit operation can be invoked. ...
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... No more than words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup procedure. If x18 Input or x18 Output bus Width is selected 131,073 for the IDT72V2103 and 262,145 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,145 for the IDT72V2103 and 524,289 for the IDT72V2113 LOW 4 ...
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... If x18 Input or x18 Output bus Width is selected 131,072 for the IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113. 5. There must be at least two words written to and read from the FIFO before a Retransmit operation can be invoked. ...
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... No more than words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup procedure. If x18 Input or x18 Output bus Width is selected 131,073 for the IDT72V2103 and 262,145 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,145 for the IDT72V2103 and 524,289 for the IDT72V2113 LOW 4 ...
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... PAF offset . maximum FIFO depth. In IDT Standard mode: if x18 Input or x18 Output bus Width is selected 131,072 for the IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113. ...
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... PAF offset maximum FIFO Depth. In IDT Standard mode: if x18 Input or x18 Output bus Width is selected 131,072 for the IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113. ...
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... NOTES IDT Standard mode maximum FIFO depth. If x18 Input or x18 Output bus Width is selected 131,072 for the IDT72V2103 and 262,144 for the IDT72V2113. If both x9 Input and x9 Output bus Widths are selected 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113. ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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... The IDT72V2103 can easily be adapted to applications requiring depths greater than 131,072 when the x18 Input or x18 Output bus Width is selected and 262,144 for the IDT72V2113. When both x9 Input and x9 Output bus Widths are selected, depths greater than 262,144 can be adapted for the IDT72V2103 and 524,288 for the IDT72V2113 ...
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... TCK t JTCKH Figure 31. Standard JTAG Timing JTAG AC ELECTRICAL CHARACTERISTICS (V = 3.3V CC Parameter JTAG Clock Input Period t IDT72V2103 JTAG Clock HIGH IDT72V2113 JTAG Clock Low Min. Max. Units JTAG Clock Rise Time - 20 ns JTAG Clock Fall Time JTAG Reset ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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... IDT JEDEC ID number is 0xB3. This translates to 0x33 when the parity is dropped in the 11-bit Manufacturer ID field. For the IDT72V2103/72V2113, the Part Number field contains the following values: Device Part# Field IDT72V2103 IDT72V2113 31(MSB Version (4 bits) Part Number (16-bit) Manufacturer ID (11-bit) 0X0 ...
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IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 ...
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ORDERING INFORMATION IDT XXXXX X XX Device Type Power Speed NOTES: 1. Industrial temperature range product for 7-5ns and 10ns are available as standard device. All other speed grades are available by special order. 2. Green parts are available. For ...