MC100ELT24 ON Semiconductor, MC100ELT24 Datasheet

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MC100ELT24

Manufacturer Part Number
MC100ELT24
Description
TTL to Differential ECL Translator
Manufacturer
ON Semiconductor
Datasheet

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MC10ELT24, MC100ELT24
5V TTL to Differential
ECL Translator
Description
Because ECL levels are used a +5 V, −5.2 V (or −4.5 V) and ground
are required. The small outline 8−lead package and the single gate of
the ELT24 makes it ideal for those applications where space,
performance and low power are at a premium.
Features
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 9
The MC10ELT/100ELT24 is a TTL to differential ECL translator.
The 100 Series contains temperature compensation.
GND = 0 V
0.8 ns t
PNP TTL Inputs for Minimal Loading
Flow Through Pinouts
Operating Range: V
Pb−Free Packages are Available
PHL
, 0.95 ns t
CC
PLH
= 4.5 V to 5.5 V; V
Typical Propagation Delay
EE
= −4.2 V to −5.5 V with
1
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
CASE 506AA
MN SUFFIX
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
H
K
5E
2T
M
TSSOP−8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
SOIC−8
Application Note AND8002/D.
DFN8
8
= MC10
= MC100
= MC10
= MC100
= Date Code
1
ORDERING INFORMATION
1
http://onsemi.com
8
1
8
1
MARKING DIAGRAMS*
ALYWG
HT24
A
L
Y
W
G
Publication Order Number:
1
HLT24
ALYW
G
G
4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
8
1
MC10ELT24/D
8
1
KLT24
ALYW
ALYWG
1
KT24
G
G
4

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MC100ELT24 Summary of contents

Page 1

... MC10ELT24, MC100ELT24 5V TTL to Differential ECL Translator Description The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used −5.2 V (or −4.5 V) and ground are required. The small outline 8−lead package and the single gate of the ELT24 makes it ideal for those applications where space, performance and low power are at a premium ...

Page 2

TTL D 2 ECL Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of ...

Page 3

Table 3. MAXIMUM RATINGS Symbol Parameter V Positive Power Supply CC V Negative Power Supply EE V Input Voltage IN I Output Current out T Operating Temperature Range A T Storage Temperature Range stg q Thermal Resistance (Junction−to−Ambient ...

Page 4

Table 6. TTL INPUT DC CHARACTERISTICS Symbol Characteristic I Input HIGH Current IH I Input HIGH Current IHH I Input LOW Current IL V Input Clamp Diode Voltage IK V Input HIGH Voltage IH V Input LOW Voltage IL NOTE: ...

Page 5

... MC10ELT24DTR2G MC10ELT24MNR4 MC10ELT24MNR4G MC100ELT24D MC100ELT24DG MC100ELT24DR2 MC100ELT24DR2G MC100ELT24DT MC100ELT24DTG MC100ELT24DTR2 MC100ELT24DTR2G MC100ELT24MNR4 MC100ELT24MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D ...

Page 6

... C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004) ...

Page 7

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− SEATING G PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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