MC100EP16VC ON Semiconductor, MC100EP16VC Datasheet

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MC100EP16VC

Manufacturer Part Number
MC100EP16VC
Description
5V ECL Differential Receiver/Driver
Manufacturer
ON Semiconductor
Datasheet

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MC100EP16VC
3.3V / 5V ECL Differential
Receiver/Driver with High
Gain and Enable Output
Description
functionally equivalent to the EP16 and LVEP16 devices but with high
gain and enable output.
data input (D) signal in a way that provides glitchless gating of the
QHG and QHG outputs.
the data output equals the data input. When the data input is HIGH and
EN goes HIGH, it will force the Q
next negative transition of the data input. If the data input is LOW
when the EN goes HIGH, the next data transition to a HIGH is ignored
and Q
transition of the data input is not passed on to the data outputs under
these conditions. The Q
state as long as the EN input is held HIGH. The EN input has no
influence on the Q output and the data input is passed on (inverted) to
this output whether EN is HIGH or LOW. This configuration is ideal
for crystal oscillator applications where the oscillator can be free
running and gated on and off synchronously without adding extra
counts to the output.
interconnect. V
decouple V
sourcing or sinking to 1.5 mA. When not used, V
open.
Features
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 5
The EP16VC is a differential receiver/driver. The device is
The EP16VC provides an EN input which is synchronized with the
When the EN signal is LOW, the input is passed to the outputs and
The V
The 100 Series contains temperature compensation.
380 ps Typical Prop Delay QHG, QHG
with V
with V
310 ps Typical Prop Delay Q,
Gain > 200
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: V
NECL Mode Operating Range: V
Open Input Default State
Q
V
Pb−Free Packages are Available
HG
BB
HG
Output
Output Will Default LOW with D Inputs Open or at V
BB
EE
EE
remains LOW and Q
/D pin is internally dedicated and available for differential
BB
= 0 V
= −3.0 V to −5.5 V
/D and V
BB
/D may rebias AC coupled inputs. When used,
HG
CC
and Q
via a 0.01 mF capacitor and limit current
HG
HG
HG
remains HIGH. The next positive
CC
CC
LOW and the Q
outputs remain in their disabled
= 3.0 V to 5.5 V
= 0 V
BB
/D should be left
HG
www.DataSheet4U.com
HIGH on the
1
EE
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
8
*For additional marking information, refer to
(Note: Microdot may be in either location)
Application Note AND8002/D.
8
1
1
ORDERING INFORMATION
A
L
Y
W
M
G
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
CASE 506AA
CASE 948R
MN SUFFIX
DT SUFFIX
CASE 751
D SUFFIX
TSSOP−8
SOIC−8
MARKING DIAGRAMS*
DFN8
Publication Order Number:
MC10EP16VC/D
8
1
8
1
KEP66
ALYW
ALYWG
1
KP66
G
G
4

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MC100EP16VC Summary of contents

Page 1

... MC100EP16VC 3. ECL Differential Receiver/Driver with High Gain and Enable Output Description The EP16VC is a differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with high gain and enable output. The EP16VC provides an EN input which is synchronized with the data input (D) signal in a way that provides glitchless gating of the QHG and QHG outputs ...

Page 2

LEN V BB LATCH Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, ...

Page 3

Table 3. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out I V Sink/Source Operating Temperature ...

Page 4

Table 5. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...

Page 5

Table 7. AC CHARACTERISTICS V Symbol Characteristic f Maximum Frequency (Figure 2) max t , Propagation Delay (Differential) Q PLH t (Differential) QHG, QHG PHL (Single−Ended) Q (Single−Ended) QHG, QHG t Setup Time ...

Page 6

900 800 700 600 500 400 300 É É É É É É É 200 É É É É É É É 100 É É É É É É É É É É É É É É É É É ...

Page 7

900 800 700 600 500 400 300 200 100 É É É É É É É É É É É É É É É É É É É É É É É É É É É É 500 ...

Page 8

... ORDERING INFORMATION Device MC100EP16VCD MC100EP16VCDG MC100EP16VCDR2 MC100EP16VCDR2G MC100EP16VCDT MC100EP16VCDTG MC100EP16VCDTR2 MC100EP16VCDTR2G MC100EP16VCMNR4 MC100EP16VCMNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D ...

Page 9

... C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004) ...

Page 10

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− SEATING G PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 11

... AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.80 1.00 A1 0.00 0.05 A3 0.20 REF b 0.20 0.30 2.00 BSC D D2 1.10 1.30 E 2.00 BSC E2 0.70 0.90 e 0.50 BSC K 0.20 −−− L 0.25 0.35 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC100EP16VC/D ...

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