MC100LVEL91 ON Semiconductor, MC100LVEL91 Datasheet
MC100LVEL91
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MC100LVEL91 Summary of contents
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... MC100LVEL91 3.3 V Triple LVPECL Input to −3 −5.0 V ECL Output Translator Description The MC100LVEL91 is a triple LVPECL input to ECL output translator. The device receives low voltage differential PECL signals, determined by the V supply level, and translates them to differential CC −3 −5.0 V ECL output signals. ...
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ECL ECL PECL/ PECL/ PECL/ LVPECL LVPECL LVPECL Figure 1. SO−20 Pinout (Top View) and Logic Diagram * All V pins are tied together on the die. CC ...
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Table 3. MAXIMUM RATINGS Symbol Parameter V PECL Power Supply CC V NECL Power Supply EE V PECL Input Voltage I I Output Current out I PECL V Sink/Source Operating Temperature Range A T Storage Temperature Range ...
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... Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC100LVEL91DW MC100LVEL91DWG MC100LVEL91DWR2 MC100LVEL91DWR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ −3 −5.5 V; GND = 0 V (Note − ...
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Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...