MC74HC589A Motorola, MC74HC589A Datasheet

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MC74HC589A

Manufacturer Part Number
MC74HC589A
Description
8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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8-Bit Serial or Parallel-Input/
Serial-Output Shift Register
with 3-State Output
High–Performance Silicon–Gate CMOS
3–state device. The device inputs are compatible with standard CMOS
outputs, with pullup resistors, they are compatible with LSTTL outputs.
an 8–bit shift register. Data can also be loaded serially (see Function Table).
The shift register output, Q H , is a three–state output, allowing this device to
be used in bus–oriented systems.
CMOS MPUs and MCUs.
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
10/95
Motorola, Inc. 1995
The MC54/74HC589A is similar in function to the HC597, which is not a
This device consists of an 8–bit storage latch which feeds parallel data to
The HC589A directly interfaces with the Motorola SPI serial data port on
OUTPUT ENABLE
PARALLEL
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 526 FETs or 131.5 Equivalent Gates
PARALLEL LOAD
INPUTS
DATA
LATCH CLOCK
SERIAL SHIFT/
SERIAL
SHIFT CLOCK
INPUT
DATA
S A
C
D
G
H
A
B
E
F
14
15
1
2
3
4
5
6
7
12
11
13
10
LATCH
DATA
LOGIC DIAGRAM
REGISTER
SHIFT
V CC = PIN 16
GND = PIN 8
1
9
Q H
OUTPUT
SERIAL
DATA
REV 0
MC54/74HC589A
16
16
16
16
1
1
GND
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
MC74HCXXXADT
ORDERING INFORMATION
1
G
1
B
C
D
E
H
F
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
CERAMIC PACKAGE
PLASTIC PACKAGE
16
15
14
13
12
10
11
TSSOP PACKAGE
9
SOIC PACKAGE
CASE 948F–01
CASE 751B–05
CASE 620–10
CASE 648–08
DT SUFFIX
N SUFFIX
D SUFFIX
V CC
A
S A
SERIAL SHIFT/
PARALLEL LOAD
LATCH CLOCK
SHIFT CLOCK
OUTPUT ENABLE
Q H
J SUFFIX
Ceramic
Plastic
SOIC
TSSOP

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MC74HC589A Summary of contents

Page 1

... H 12 LATCH CLOCK 11 SHIFT CLOCK SERIAL SHIFT/ 13 PARALLEL LOAD 10 OUTPUT ENABLE This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. 10/95 Motorola, Inc. 1995 MC54/74HC589A PIN 16 GND = PIN 8 SHIFT REGISTER ...

Page 2

... TSSOP Package: – 6.1 mW from 125 _ C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). Î Î Î Î ...

Page 3

... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ...

Page 4

... NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA Î Î Î Î ...

Page 5

... Z = high impedance * = depends on Latch Clock input 5 MC54/74HC589A Resulting Function Data Shift Latch Register Output Q H Contents Contents a– a–h a– N+1 a– N+1 MOTOROLA ...

Page 6

... Q H 50% Figure 3. DATA VALID A–H 50 LATCH CLOCK 50% Figure 5. SERIAL SHIFT/ 50% PARALLEL LOAD t su SHIFT CLOCK 50% Figure 7. MOTOROLA SWITCHING WAVEFORMS V CC GND SHIFT CLOCK Q H 50% Figure 2. (Serial Shift/Parallel Load = GND SERIAL SHIFT/ HIGH IMPEDANCE PARALLEL LOAD 10 90% ...

Page 7

... Q H output into the high impedance state. A low level enables the output. This control does not affect the state of the input latch or the shift register. OUTPUT Q H (Pin 9) Serial data output. This pin is the output from the last stage of the shift register. This is a 3–state output. 7 MC54/74HC589A MOTOROLA ...

Page 8

... É É É É É É É É É É HIGH IMPEDANCE É É É É É SERIAL SHIFT RESET LATCH LOAD LATCH PARALLEL LOAD AND SHIFT REGISTER SHIFT REGISTER MOTOROLA TIMING DIAGRAM ...

Page 9

... Stages C thru G (not shown in detail) are identical to stages A and B above. High–Speed CMOS Logic Data DL129 — Rev 6 LOGIC DETAIL STAGE A Q STAGE B Q STAGE C* STAGE D* STAGE E* STAGE F* STAGE G* STAGE MC54/74HC589A MOTOROLA ...

Page 10

... 0.25 (0.010) –A – –T – SEATING PLANE 0.25 (0.010 MOTOROLA OUTLINE DIMENSIONS J SUFFIX CERAMIC PACKAGE CASE 620–10 ISSUE V –B – 0.25 (0.010 SUFFIX PLASTIC PACKAGE CASE 648–08 ...

Page 11

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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