MCM6343 Motorola, MCM6343 Datasheet

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MCM6343

Manufacturer Part Number
MCM6343
Description
256K x 15 Bit 3.3 V Asynchronous Fast Static RAM
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
256K x 16 Bit 3.3 V Asynchronous
Fast Static RAM
262,144 words of 16 bits. Static design eliminates the need for external clocks
or timing strobes.
enable (G) pins, allowing for greater system flexibility and eliminating bus con-
tention problems. Separate byte enable controls (LB and UB) allow individual
bytes to be written and read. LB controls the lower bits DQ0 to DQ7, while UB
controls the upper bits DQ8 to DQ15.
and a 44–lead TSOP Type II package.
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 2
2/10/98
MOTOROLA FAST SRAM
UB
LB
W
G
A
E
The MCM6343 is a 4,194,304–bit static random access memory organized as
The MCM6343 is equipped with chip enable (E), write enable (W), and output
The MCM6343 is available in a 400 mil, 44–lead small–outline SOJ package
Motorola, Inc. 1998
Single 3.3 V
Fast Access Time: 12/15 ns
Equal Address and Chip Enable Access Time
All Inputs and Outputs are TTL Compatible
Data Byte Control
Fully Static Operation
Power Operation: 250/240/230 mA Maximum, Active AC
Commercial and Standard Industrial Temperature Option: – 40 to + 85 C
18
ADDRESS
BUFFERS
OUTPUT
BUFFER
BUFFER
BUFFER
ENABLE
BUFFER
ENABLE
ENABLE
ENABLE
WRITE
BYTE
CHIP
0.3 V Power Supply
9
9
DECODER
BLOCK DIAGRAM
ROW
256K x 16
MEMORY
ARRAY
BIT
HIGH BYTE WRITE ENABLE
LOW BYTE WRITE ENABLE
DECODER
COLUMN
HIGH BYTE OUTPUT ENABLE
LOW BYTE OUTPUT ENABLE
16
SENSE
AMPS
8
8
8
8
OUTPUT
OUTPUT
BUFFER
BUFFER
DRIVER
DRIVER
WRITE
WRITE
HIGH
BYTE
HIGH
BYTE
BYTE
BYTE
LOW
LOW
8
8
8
8
A0 – A17
E
W
G
UB
LB
DQ0 – DQ15
V DD
V SS
NC
. . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
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. . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . .
DQ0
DQ1
DQ2
DQ3
V DD
V SS
DQ4
DQ5
DQ6
DQ7
MCM6343
. . . . . . . . . . . . . . . . .
PIN ASSIGNMENT
W
A
A
A
A
A
E
A
A
A
A
A
. . . . . . . . . .
PIN NAMES
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+ 3.3 V Power Supply
Order this document
CASE 924A–02
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
TS PACKAGE
TSOP TYPE II
Data Input/Output
YJ PACKAGE
CASE 919–01
400 MIL SOJ
No Connection
Output Enable
by MCM6343/D
Address Input
Write Enable
A
A
A
G
UB
LB
DQ15
DQ14
DQ13
DQ12
V SS
V DD
DQ11
DQ10
DQ9
DQ8
NC
A
A
A
A
A
Chip Enable
Upper Byte
Lower Byte
MCM6343
Ground
1

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MCM6343 Summary of contents

Page 1

... Static design eliminates the need for external clocks or timing strobes. The MCM6343 is equipped with chip enable (E), write enable (W), and output enable (G) pins, allowing for greater system flexibility and eliminating bus con- tention problems. Separate byte enable controls (LB and UB) allow individual bytes to be written and read ...

Page 2

... ATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. 2. All voltages are referenced Power dissipation capability will be dependent upon package characteristics and use environment. MCM6343 2 Mode V DD Current DQ0 – DQ7 Not Selected I SB1 , I SB2 High– ...

Page 3

... 4.0 mA 100 – 4.0 mA – 100 A) Symbol MCM6343–12: t AVAV = MCM6343–15: t AVAV = 15 ns MCM6343–12: t AVAV = SB1 MCM6343–15: t AVAV = 0 – 0 SB2 Symbol I/O Typ Max Unit 3.3 3 ...

Page 4

... On the other hand, responses from the memory are specified from the device point of view. Thus, the ac 1.5 V cess time is shown as a maximum since the device never provides data later than that time. Figure 1. AC Test Load . . . . . . . . . . . . . . . . . . . . . . . . . 1.50 V See Figure 1 MCM6343–15 Min Max U i Unit N Notes 15 — ...

Page 5

... E (CHIP ENABLE) G (OUTPUT ENABLE) LB, UB (BYTE ENABLE) Q (DATA OUT) MOTOROLA FAST SRAM READ CYCLE 1 (See Note 8) t AVAV t AXQX t AVQV READ CYCLE 2 (See Note 4) t AVAV t AVQV t ELQV t ELQX t GLQV t GLQX t BLQV t BLQX DATA VALID t EHQZ t GHQZ t BHQZ DATA VALID MCM6343 5 ...

Page 6

... WLQZ WHQX 3 — t WHAX 0 — WRITE CYCLE 1 (W Controlled; See Notes 1, 2, and 3) t AVAV t AVWH t WLEH t WLWH t AVWL t DVWH DATA VALID t WLQZ HIGH–Z MCM6343–15 Min Max U i Unit N Notes 15 — — — — — ...

Page 7

... AVAV t AVEH t ELEH t AVEL t ELWH HIGH–Z MCM6343–15 Min Max Unit U i Notes N 15 — — — — — — — — — EHAX t DVEH t EHDX DATA VALID MCM6343 7 ...

Page 8

... BLWH 9 — t BLEH t DVBH 6 — t BHDX 0 — WRITE CYCLE 3 (E Controlled; See Notes 1, 2, and 3) t AVAV t AVBH t AVBL t BLEH t BLWH t DVBH DATA VALID HIGH–Z MCM6343–15 Min Max Unit U i Notes N 15 — — — — — ...

Page 9

... XCM Motorola Memory Prefix Part Number Full Commercial Part Numbers — MCM6343YJ12 Full Industrial Part Numbers — SCM6343YJ12A * Not available in Tape and Reel 0.007 e 42X A3 SEATING PLANE C b 44X 0.007 0.007 0.015 B 22 ZONES 2X VIEW A–A ...

Page 10

... Nishi-Gotanda, Shagawa-ku, Tokyo, Japan. 03-5487-8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, CUSTOMER FOCUS CENTER: 1-800-521-6274 22X 0 MILLIMETERS MIN MAX A ––– 1.20 0.05 0.15 0.95 1.05 b 0.30 0.45 c 0.12 0.21 D 18.28 18.54 e 0.80 BSC E 11.56 11.96 10.03 10.29 L 0.40 0. Mfax is a trademark of Motorola, Inc. MCM6343/D MOTOROLA FAST SRAM ...

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