NCN6010D ON, NCN6010D Datasheet
NCN6010D
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NCN6010D Summary of contents
Page 1
... DD 13 STOP 2 Cta Ctb MOD_VCC 12 3 PWR_ON 4 11 SIM_IO I/O GND 5 10 CLOCK SIM_CLK 6 9 RESET 8 SIM_RST 7 (Top View ORDERING INFORMATION Device Package Shipping NCN6010DTB TSSOP–14 96 Units/Rail NCN6010DTBR2 TSSOP–14 2500 Tape & Reel Publication Order Number: NCN6010/D NCN 6010 ...
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... STOP ENABLE 2 MOD_V POWER UNIT & LOGIC 4 PWR_ON CLOCK 6 RESET DATA I/O 5 Figure 2. NCN6010 Block Diagram NCN6010 MANAGEMENT GND GND V CC GND I/O DATA I/O GND GND http://onsemi.com 2 SIM_V 14 CC Cta 13 Ctb 12 9 SIM_CLK SIM_RST 8 SIM_IO 11 10 GROUND ...
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... Min/Max values defined by the specification (typically 50%). The built–in level shifter translates the input signal to the external SIM card CLK input. The RESET signal present at this pin is connected to the SIM card. The internal level shifter translates the level according to the voltages present at pin 1 and the SIM_VCC programmed value ...
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... C A Thermal Resistance Junction to Air Operating Ambient Temperature Range Operating Junction Temperature Range Maximum Junction Temperature Storage Temperature Range 1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T NCN6010 Symbol V DD SIM_VCC –0 STOP – ...
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... 350 s delay must be observed by the external MPU prior to reactivate the SIM_VCC output. 4. Using low ESR capacitors type (max 100 mandatory for Ct, Cout1 and Cout2 to reach the NCN6010 specifications. Ceramic type (X5R or X7R) are recommended. DIGITAL INPUT SECTION CLOCK, RESET, I/O, STOP, MOD_VCC, PWR_ON ...
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... DD test. 6. The SIM_CLK clock can operate MHz, but the rise and fall time are not guaranteed to be fully within the ISO7816 specification over the temperature range. Typically, tr and tf are CRD_CLK = 10 MHz. 7. Digital inputs undershoot t –0.30 V, Digital inputs overshoot t 0.30 V. ...
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... The SIM_VCC voltage is programmed to 3.0 V. The NCN6010 is in normal operating mode. The SIM card supply is enabled, SIM_VCC voltage is the one previously programmed, all the SIM interface pins are active. voltage. When the output voltage starts from zero, as depicted in Figure stabilization delay (typical) is necessary to make sure all the output signals are biased at the nominal 5 ...
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... STOP pin is taken High again. When the card is extracted, the external MPU shall detect the operation and run the Power Down of the card by forcing PWR_ON input to Low. The NCN6010 fulfills the power sequence as defined by the ISO/CEI 7816–3 norm (see oscillogram given in Figure 5) ...
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... The typical waveform provided in Figure 7 shows how the accelerator operates. During the first 200 ns (typical), the slope of the rise time is solely a function of the pull up resistor associated with the stray capacitance. During this period, the PMOS devices are not activated since the input voltage is below their Vgs threshold ...
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... S5. The SIM_VCC voltage follows the input value, minus the drop coming from the internal resistance . The current is limited by the Ron of the power device S5 and t he output voltage will decrease as the load current increases above 20 mA (typical). Figure 10 illustrates the theoretical waveforms ...
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... C1 charge transfer into the output load. The current is limited by three mains parameters: – the Ron of the switching MOS (S1 through S4) – the operating frequency – the C1/C2 ratio and their ESR The first parameters are depending upon the internal ...
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... S2, S4 and S5 have been defined in the PSPICE model to represent the NMOS and PMOS used in the silicon. The ESR value of C2 and C3 can be adjusted, at PSPICE level, to cope with any type of external capacitors and are useful to double check the behavior of the system as a function of the external passives components ...
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... V(C2:2) 2 SEL>> –2 I(R4) Figure 12. Simulated Charge Pump Typical Waveforms Figure 13. SIM_VCC Output Voltage Ripple @ Iout = 10 mA NCN6010 capacitor. The real ripple voltage, coming from the engineering board, is given in Figure 13. Charge Pump Transfer Capacitor Current 20 TIME ( s) http://onsemi.com ...
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... +3 CLK IRQ 1 R4 TP1 TP2 TP3 100 R E RST I/O GND S3 MANUAL PWR_ON +3 100 POL. DET GND C2 1 NCN6010 SIM_V Cta STOP 3 MOD_V Ctb PWR_ON ...
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... Figure 15. Engineering Test Board Silk Layer Figure 16. Engineering Test Board Top Layer NCN6010 Obviously, a GSM application will use much less area, but cares must be observed to locate the capacitors as close as possible to the integrated circuit associated pins. Capacitors C1, C2, C3, C4 and C5 are ceramic, X7R surface mount ...
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... SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold ...