PI90LV387 Pericom Semiconductor Corporation, PI90LV387 Datasheet

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PI90LV387

Manufacturer Part Number
PI90LV387
Description
High-Speed Differential Line Drivers
Manufacturer
Pericom Semiconductor Corporation
Datasheet
Features
• Sixteen line drivers meet or exceed the requirements of the
• Designed for signaling rates up to 500 Mbps with very low
• Low voltage differential signaling with typical output voltage
• Propagation delay times less than 2.6ns
• Output skew is less than 150ps
• Part-to-part skew is less than 1.5ns
• 35mW total power dissipation in each driver operating at 200
• Bus-pin ESD protection exceeds 10kV
• Low voltage TTL (LVTTL) logic inputs are 5V tolerant
• Packaging (Pb-free & Green available):
Pin Diagram
ANSI EIA/TIA-644 Standard
radiation (EMI)
of 350mV into :
– 100Ω load (PI90LV387)
– 50Ω load (PI90LVB387)
MHz
-64-Pin TSSOP (A)
1DIN1
3DIN1
3DIN2
1DIN2
1DIN3
1DIN4
2DIN1
2DIN2
2DIN3
2DIN4
3DIN3
3DIN4
4DIN1
4DIN2
4DIN3
4DIN4
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
VCC
VCC
EN1
EN2
EN3
EN3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64-Pin
A
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
37
37
36
35
34
33
1DO1+
1DO1 –
1DO2+
1DO2 –
1DO3+
1DO3 –
1DO4+
1DO4 –
2DO1+
2DO1 –
2DO2+
2DO2–
2DO3 –
2DO4+
2DO4 –
3DO1+
3DO1 –
3DO2+
3DO2 –
3DO3+
3DO3 –
3DO4+
3DO4 –
4DO1+
4DO1 –
4DO2+
4DO2 –
4DO3+
4DO3 –
4DO4+
4DO4 –
2DO3+
1
Description
PI90LV387/ PI90LVB387 consists of sixteen differential line
drivers that implement the electrical characteristics of low-volt-
age differential signaling (LVDS). This signaling technique lowers
output voltage levels to reduce power, increase switching speeds,
and allow operation with a 3V supply rail.
The intended application of this device and signaling technique
is for point-to-point baseband (single termination) and multi-
point (double termination) data transmission over a controlled
impedance media of approximately 100Ω and 50Ω (LVB387).
The transmission media may be printed-circuit board traces, back-
planes, or cables. The large number of drivers integrated into the
same substrate, with the low pulse skew of balanced signaling,
allows extremely precise timing alignment of clock and data for
synchronous parallel data transfers. When used with its companion
16-channel receivers, the PI90LV386 or PI90LVT386, over 400
million data transfers per second in single-edge clocked systems
are possible with very little power.
(Note: The ultimate rate and distance of data transfer is dependent
upon attenuation characteristics of the media, the noise coupling
to the environment, and other system characteristics.)
The drivers are enabled in groups of five. When disabled, driver
outputs are at a high impedance. Each driver input (D
able (EN) have an internal pulldown that drives the input to a low
level when open circuited.
The parts are characterized for operation from –40°C to 85°C.
Block Diagram
High-Speed Differential Line Drivers
D
D
D
D
EN
IN1
IN2
IN3
IN4
PI90LV387/ PI90LVB387
1 of 4
D
D
D
D
D
D
D
D
O1+
O1–
O2+
O2–
O3+
O3–
O4+
O4–
PS8573C
IN
) and en-
09/22/04

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PI90LV387 Summary of contents

Page 1

... VCC 31 32 GND Description PI90LV387/ PI90LVB387 consists of sixteen differential line drivers that implement the electrical characteristics of low-volt- age differential signaling (LVDS). This signaling technique lowers output voltage levels to reduce power, increase switching speeds, and allow operation with a 3V supply rail. The intended application of this device and signaling technique ...

Page 2

... Tested in accordance with MIL-STD-883C Method 3015.7 Driver Function Table Nom. Max. Units Differential Input 3.3 3 0.8 85 ºC Open Notes high level low level irrelevent high impedance (off) 2 PI90LV387/PI90LVB387 High-Speed Differential Line Drivers Enables OUT PS8573C ...

Page 3

... ODOUT+ ODOUT- LVB LVB 0V 2. 0.4 sin (4E6� 0.4 sin (4E6�t) + 0.5V, I Disabled 3 PI90LV387/PI90LVB387 Min. Typ. Max. Units 247 340 454 mV -50 50 1.125 1.375 V 1.000 1.375 - 150 122 190 3 20 µ ...

Page 4

... Parameter all drivers of a single device with all of their inputs connected to- PLH PHL 4 PI90LV387/PI90LVB387 High-Speed Differential Line Drivers Test Conditions Min. Typ. 0.9 1.8 0.9 1 50Ω ...

Page 5

... VOC(PP) is made on test equipment with a –3dB bandwidth of at least 300MHz. Figure 1. Voltage and Current Definitions Figure 2. V Test Circuit includes instrumentation and fixture capacitance within 0.06m of the D.U.T. The measurement L 5 PI90LV387/PI90LVB387 High-Speed Differential Line Drivers ≤1ns, Pulse Repetition Rate f PS8573C 09/22/04 ...

Page 6

... All input pulses are supplied by a generator having the following characteristics: t (PRR) = 0.5 Mpps, Pulse width = 500 ±10ns. C includes instrumentation and fixture capacitance within 0.06m of the D.U.T. L Figure 5. Enable & Disable Time Circuit & Definitions 6 PI90LV387/PI90LVB387 High-Speed Differential Line Drivers or t ≤1ns, Pulse Repetition Rate (PRR Mpps, Pulse ≤ ...

Page 7

... Max. .002 .006 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Package Code A 64-pin TSSOP A Pb-free & Green, 64-pin TSSOP A 64-pin TSSOP A Pb-free & Green, 64-pin TSSOP 7 PI90LV387/PI90LVB387 High-Speed Differential Line Drivers .236 6.0 .244 6.2 0.45 .018 0.75 .030 SEATING PLANE .319 BSC 8.1 .004 0.10 0.05 0.15 Package Type PS8573C ...

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