sy100ep195v Micrel Semiconductor, sy100ep195v Datasheet
sy100ep195v
Available stocks
Related parts for sy100ep195v
sy100ep195v Summary of contents
Page 1
... CC can be PECL, LVPECL, NECL, or LVNECL. The delay varies in discrete steps based on a control word presented to SY100EP195V. The 10-bit width of this latched control register allows for delay increments of approximately 10ps. An eleventh control bit allows the cascading of multiple SY100EP195V devices, for a wider delay range. Each additional SY100EP195V effectively doubles the delay range available ...
Page 2
... 10-bit Latch Latch 2 SY100EP195V Operating Package Range Marking Industrial SY100EP195V Industrial SY100EP195V Industrial SY100EP195V with Pb-Free bar-line indicator Industrial SY100EP195V with Pb-Free bar-line indicator = 25°C, DC Electricals only ...
Page 3
... Most Positive Supply: Supply ground for NECL systems. Bypass to V 0.01µF low ESR capacitors. 100 ECL Outputs: These outputs are used when cascading two or more SY100EP195V to extend the delay range required. ECL Control Input: When set active low are a delayed version of IN, /IN. When set inactive high, IN, /IN are gated such that Q, /Q become a differential logic low ...
Page 4
... Supply Voltage (V PECL Mode (V Supply Voltage (V NECL Mode (V Ambient Temperature (T +0.5V Package Thermal Resistance CC –0.5V TQFP-32 (θ EE Still-air ............................................................. 50°C/W 500lfpm ............................................................ 42°C/W TQFP-32 (θ Condition No load, over supply voltage 4 SY100EP195V ( =0V) ............................. +3.0V to +5. =0V) ............................ –3.0V to –5. ......................... –40°C to +85° ..................................................... 20°C/W JC Min Typ Max 3 ...
Page 5
... Condition Figures Figures Figures 1, 4 Figures 1, 4 Figure can vary +0.3V to –2.2V range is referenced to the most positive side of the differential input signal. IHCMR 5 ECL Pro® SY100EP195V Min Typ Max Units 2155 2280 2405 mV 1355 1480 1605 mV 2075 ...
Page 6
... Figure can vary +2.0V to –0.5V range is referenced to the most positive side of the differential input signal. IHCMR range is referenced to the most positive side of the differential input signal. IHCMR 6 ECL Pro® SY100EP195V Min Typ Max Units 3855 3980 4105 mV 3055 3180 ...
Page 7
... V – 2V SY100EP195V (12, 13) ° ° + + Typ Max Min Typ 2.5 2.5 2050 2600 1950 2250 12200 14000 10600 ...
Page 8
... FREQUENCY (MHz) M9999-120505 hbwhelp@micrel.com or (408) 955-1690 Supply Current vs. Temperature 180 160 140 120 100 -40 - 100 TEMPERATURE (°C) 8 ECL Pro® SY100EP195V ...
Page 9
... SY100EP195V /EN LEN SETMIN SETMAX D[0:10] 75k Figure 1b. Single-Ended Input Structure M9999-120505 hbwhelp@micrel.com or (408) 955-1690 Figure 3a. Output Levels, PECL, LVPECL 9 SY100EP195V CASCADE /Q, /CASCADE SY100EP195V Figure 2. Emitter Output Structure CASCADE OH /CASCADE CASCADE /CASCADE Figure 3b. Output Levels, NECL ...
Page 10
... M9999-120505 hbwhelp@micrel.com or (408) 955-1690 0V Invalid V IH(MAX) Logic High V IH(MIN) Invalid V IL(MAX) Logic Low V IL(MIN Invalid Figure 4c. Input Levels, NECL IN /IN Figure 5a. Input Common Mode, PECL, LVPECL IN /IN Figure 5b. Input Common Mode, NECL 10 ECL Pro® SY100EP195V V IHCMR IHCMR V IHCMR ...
Page 11
... – +3.3V 82Ω 82Ω Figure 6c. Terminating Unused I/O reference pin . BB . Bypass with a 0.01µF capacitor not GND, as PECL is referenced SY100EP195V +3. – +3.3V “Destination” C1 (optional) 0.01µF = 110Ω. b +3.3V 50Ω 0.01µ ECL Pro® ...
Page 12
... EE to the D Inputs +3.3 or +5.0 CC CMOS D[0:10] Inputs ; -2 '# and V are not connected +3.3V CC TTL D[0:10] Inputs 1.5k SY100EP195V the D Inputs, with V = 3.3V CC +5.0 CC TTL D[0:10] Inputs 500 ; -2 '# the D Inputs, with V = 5.0V CC ECL Pro® ...
Page 13
... PECL, CMOS, or TTL interface standards. Since multiplexers must appear in the delay path, SY100EP195V has a minimum delay of about 2.2ns. Delays below this value are not possible. In addition, when cascading multiple SY100EP195V to extend the delay range, the minimum delay is about 2.2ns times the number of SY100EP195V in cascade ...
Page 14
... Micrel, Inc. Signal Path Logic Standard PECL LVPECL NECL M9999-120505 hbwhelp@micrel.com or (408) 955-1690 +4.5V to +5.5V 0V +3.0V to +3. –3.0 to –5.5V Table 6. Signal Path Logic Standard 14 ECL Pro® SY100EP195V Delay Control Input Choices PECL, CMOS, TTL LVPECL, CMOS, TTL NECL ...
Page 15
... PECL or LVPECL. Figures 9 show how to connect V V for all possible cases. EF Cascading Two or more SY100EP195V may be cascaded, in order to extend the range of delays permitted. Each additional SY100EP195V adds about 2200ps to the minimum delay, and adds another 10240ps to the delay range. is used Internal cascade circuitry has been included in the BB SY100EP195V ...
Page 16
... Precision CML Delay Line M9999-120505 hbwhelp@micrel.com or (408) 955-1690 Control Word (12bits) SY100EP195V SY100EP195V C[11] D[10 /IN /Q /IN SETMIN SETMIN /CASCADE SETMAX SETMAX CASCADE Figure 10c. Cascading Four SY100EP195V Data Sheet Link http://www.micrel.com/product-info/products/sy100ep196v.shtml http://www.micrel.com/product-info/products/sy55856u.shtml 16 SY100EP195V SY100EP195V C[10] D[10] C[9:0] D[9: /IN /Q /CASCADE CASCADE ECL Pro® ...
Page 17
... Table 7. List of Nominal Delay Values for Cascaded SY100EP195V M9999-120505 hbwhelp@micrel.com or (408) 955-1690 Nominal Delay (ps) One Chip Two Chips Three Chips 2,200 4,400 2,210 4,410 2,220 4,420 2,240 4,440 2,280 4,480 ...
Page 18
... Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify M9999-120505 hbwhelp@micrel.com or (408) 955-1690 + 1 (408) 474-1000 FAX WEB Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. 18 SY100EP195V Rev. 01 http://www.micrel.com ECL Pro® ...