sy89828l Micrel Semiconductor, sy89828l Datasheet

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sy89828l

Manufacturer Part Number
sy89828l
Description
Sy89828l 3.3v 1ghz Dual 1 10 Precision Lvds Fanout Buffer/translator With 2 1 Input Mux
Manufacturer
Micrel Semiconductor
Datasheet

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sy89828lHG
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Micrel Inc
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Micrel Inc
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Micrel Inc
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MicreL, Inc.
Precision Edge is a registered trademark of Micrel, Inc.
M9999-012208
hbwhelp@micrel.com or (408) 955-1690
FEATURES
APPLICATIONS
TYPICAL APPLICATION CIRCUIT
High-performance dual 1:10, 1GHz LVDS fanout
buffer/translator
Two banks of 10 differential LVDS outputs
Guaranteed AC parameters over temperature and
voltage:
• > 1GHz f
• < 50ps within device skew
• < 400ps t
Each bank includes a 2:1 input mux
2:1 mux input accepts LVDS and LVPECL
Low jitter performance
• < 1ps
• < 1ps
3.3V supply voltage
Output enable function
LVDS input includes internal 100
Available in a 64-Pin EPAD-TQFP
Enterprise networking
High-end servers
Communications
System using SY89828L as a switchover circuit from a Primary Clock to a Redundant backup Clock in a fail-safe application.
LVPECL inputs not shown in this application.
RMS
PP
total jitter
MAX
r
, t
cycle-to-cycle jitter
f
time
Primary Clock Source
Backup Clock Source
/LVDS_CLKA
/LVDS_CLKB
LVDS_CLKA
LVDS_CLKB
termination
3.3V 1GHz DUAL 1:10 PRECISION
LVDS FANOUT BUFFER/
TRANSLATOR WITH 2:1 INPUT MUX
Primary/Backup Clock Select
(Switchover with 2.0ns)
SEL1
1
differential LVDS (Low Voltage Differential Swing) output
pairs. The part is designed for use in low voltage 3.3V
applications that require a large number of outputs to drive
precisely aligned, ultra low-skew signals to their destination.
The input is multiplexed from either LVDS or LVPECL (Low
Voltage Positive Emitter Coupled Logic) by the CLK_SEL1
and CLK_SEL2 pins. The Output Enables (OE1 and OE2)
are synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
asynchronous control.
than 50ps—performance previously unachievable in a
standard product having such a high number of outputs.
The SY89828L is available in a single space saving package,
enabling a lower overall cost solution.
DESCRIPTION
The SY89828L is a precision fanout buffer with 20
The SY89828L features a low pin-to-pin skew of less
5
5
5
5
100Ω
100Ω
Redundant
Primary
Card
Card
Precision Edge
Rev.: D
Issue Date: January 2008
Precision Edge
Precision Edge
SY89828L
Amendment: /0
SY89828L
®
®
®

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sy89828l Summary of contents

Page 1

... LVDS_CLKA /LVDS_CLKA Backup Clock Source LVDS_CLKB /LVDS_CLKB System using SY89828L as a switchover circuit from a Primary Clock to a Redundant backup Clock in a fail-safe application. LVPECL inputs not shown in this application. Precision Edge is a registered trademark of Micrel, Inc. M9999-012208 hbwhelp@micrel.com or (408) 955-1690 3.3V 1GHz DUAL 1:10 PRECISION ...

Page 2

... CLK_SEL2 SEL2 OE2 2 Precision Edge (1) Operating Package Range Marking Industrial SY89828LHI Industrial SY89828LHI Industrial SY89828LHY with Pb-Free bar-line indicator Matte-Sn Industrial SY89828LHY with Pb-Free bar-line indicator Matte-Sn = 25°C, DC electricals only – /Q0 – /Q9 LEN Q10 – Q19 10 /Q10 – /Q19 ...

Page 3

... Output LVDS Differential outputs from CLKA when SEL2 = LOW and from CLKB when SEL2 = HIGH. Q outputs are static LOW when OE2 = LOW. Unused output pairs must be externally terminated with 100Ω to maintain low jitter and skew. 3 Precision Edge ® SY89828L ...

Page 4

... Output LVDS Differential outputs (complement) from CLKA when SEL2 = LOW and from CLKB when SEL2 = HIGH. /Q outputs are static HIGH when OE2 = LOW. Unused output pairs must be externally terminated with 100Ω to maintain low jitter and skew. 4 Precision Edge ® SY89828L ...

Page 5

... LVPECL_CLKB /LVPECL_CLKB LVDS_CLKB /LVDS_CLKB /LVDS_CLKB LVDS_CLKA /LVDS_CLKA LVDS_CLKA /LVDS_CLKA /LVDS_CLKB LVPECL_CLKA /LVPECL_CLKA /LVDS_CLKB LVDS_CLKB /LVDS_CLKB HIGH LVDS_CLKA /LVDS_CLKA HIGH LVPECL_CLKA /LVPECL_CLKA HIGH LVDS_CLKB /LVDS_CLKB HIGH LVPECL_CLKB /LVPECL_CLKB /LVDS_CLKA LOW LOW /LVDS_CLKB LOW LOW HIGH LOW ® SY89828L HIGH HIGH HIGH HIGH HIGH ...

Page 6

... Note 4 Max Load, Max Condition 6 Precision Edge (Note 2) ) ......................... –40°C to +85° ......................................................... 4.4°C/W JC Min Typ 3.0 3.3 45 160 Min Typ 0 100 –1.25 80 100 and V are not internally CCI CCO ® SY89828L Max Units 3 260 mA Max Units 2 120 Ω ...

Page 7

... GNDI + 1.8V. CCI CMR = –40°C to +85°C A Condition 0. –40°C to +85°C Condition Note 7, 8 Note 7 Note 7 Note 8 7 Precision Edge SY89828L Min Typ Max Units V –1.165 V –0.880 –1.945 V –1.625 300 mV GNDI +1 ...

Page 8

... LVDS Input: 100mV LVDS Input: 400mV CLK_SEL to Valid Output Note 4 Note 4 Note 5 0°C to +85°C –40°C Note 6 Note 7 Note 8 12 output edges will deviate by more than the specified peak- 8 Precision Edge ® SY89828L Min Typ Max Units 1.0 GHz 0.950 1.15 1.45 ns 0.80 1.0 1.3 ns 1.10 1 ...

Page 9

... LVDS IN = 250mV 1600 LVDS INPUT 1400 1200 1000 800 LVPECL INPUT 600 400 200 0 -50 - 100 TEMPERATURE (°C) CLK_SEL Switchover Time vs. Temperature 1800 1600 1400 1200 1000 800 600 400 200 0 -50 - 100 TEMPERATURE (°C) ® SY89828L ...

Page 10

... Micrel, Inc. FUNCTIONAL CHARACTERISTICS 155MHz Output T = 25° 3.3V CC TIME (500ps/div.) M9999-012208 hbwhelp@micrel.com or (408) 955-1690 T = 25° 3.3V CC 1GHz Output T = 25° 3.3V CC TIME (100ps/div.) 10 Precision Edge ® SY89828L 622MHz Output TIME (200ps/div.) ...

Page 11

... V CC 1.9k 1.9k 1.4k 1.4k LVDS_CLK 100Ω /LVDS_CLK GND Figure 2. Simplified LVDS Input Stage 50Ω, ±1% 50Ω, ±1% GND Figure 4. LVDS Common Mode Measurement Q OUT 750mV Q OUT OUT Figure 6. Output Driver Signal Levels (Differential) Precision Edge ® SY89828L v , OCM ∆v OCM – /Q OUT ...

Page 12

... Micrel, Inc. DETAILED DESCRIPTION The SY89828L is a precision dual 1:10 fanout buffer. It allows either LVPECL or LVDS inputs, selectable by an input muxes, and outputs 2 sets of 10 LVDS output pairs. The device features 2 synchronous output enables. The SY89828L provides extremely low skew across its outputs. ...

Page 13

... Exposed pad must be soldered to a ground for proper thermal management (408) 944-0970 FAX Micrel for any damages resulting from such use or sale. © 2002 Micrel, Incorporated. 13 +0.15 –0.15 +0.006 –0.006 Package EP- Exposed Pad Die http://www.micrel.com WEB Precision Edge ® SY89828L Rev. 02 ...

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